diff options
| author | Nick Clifton <nickc@redhat.com> | 2020-07-07 09:37:38 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2020-07-07 09:37:38 +0100 |
| commit | 3c6e74ce51d9439c2697cfec508ce885ddae8f21 (patch) | |
| tree | 08bb3e4edde164457e4b0d05b2f97914d4364f4b /gas/testsuite | |
| parent | 931452b64424e41bb51e798a6d2f12265efe12cc (diff) | |
| download | gdb-3c6e74ce51d9439c2697cfec508ce885ddae8f21.zip gdb-3c6e74ce51d9439c2697cfec508ce885ddae8f21.tar.gz gdb-3c6e74ce51d9439c2697cfec508ce885ddae8f21.tar.bz2 | |
Fix recent failures in the ARM assembler testsuite due to the correction of a spelling mistake.
* testsuite/gas/arm/cde-missing-fp.l: Fix spelling mistake in
expected output.
Diffstat (limited to 'gas/testsuite')
| -rw-r--r-- | gas/testsuite/gas/arm/cde-missing-fp.l | 184 |
1 files changed, 92 insertions, 92 deletions
diff --git a/gas/testsuite/gas/arm/cde-missing-fp.l b/gas/testsuite/gas/arm/cde-missing-fp.l index 2fbfa9d..0dae24b 100644 --- a/gas/testsuite/gas/arm/cde-missing-fp.l +++ b/gas/testsuite/gas/arm/cde-missing-fp.l @@ -54,95 +54,95 @@ [^ :]+:[0-9]+: Error: selected processor does not support `vptt\.i8 eq,q0,q0' in Thumb mode [^ :]+:[0-9]+: Error: bad instruction `vcx3t p0,q0,q0,q0,#0' [^ :]+:[0-9]+: Error: bad instruction `vcx3at p0,q0,q0,q0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#1920' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#64' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#63' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p7,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s1,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s30,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#1920' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#64' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#63' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p7,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d15,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#1920' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#64' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#63' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p7,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s1,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s30,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#1920' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#64' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#63' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p7,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d15,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#60' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#2' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#1' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p7,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s1,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s30,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s1,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s30,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#60' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#2' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#1' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p7,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d15,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d15,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#60' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#2' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#1' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p7,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s1,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s30,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s1,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s30,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#60' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#2' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#1' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p7,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d15,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d15,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s0,#6' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s0,#1' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p7,s0,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s1,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s30,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s1,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s30,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s1,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s30,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d0,#6' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d0,#1' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p7,d0,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d15,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d15,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d15,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s0,#6' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s0,#1' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p7,s0,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s1,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s30,s0,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s1,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s30,s0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s1,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s30,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d0,#6' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d0,#1' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p7,d0,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d15,d0,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d15,d0,#0' -[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d15,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#1920' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#64' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#63' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p7,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s1,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s30,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#1920' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#64' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#63' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p7,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d15,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#1920' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#64' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#63' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p7,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s1,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s30,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#1920' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#64' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#63' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p7,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d15,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#60' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#2' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#1' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p7,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s1,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s30,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s1,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s30,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#60' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#2' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#1' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p7,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d15,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d15,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#60' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#2' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#1' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p7,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s1,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s30,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s1,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s30,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#60' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#2' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#1' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p7,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d15,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d15,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s0,#6' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s0,#1' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p7,s0,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s1,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s30,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s1,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s30,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s1,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s30,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d0,#6' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d0,#1' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p7,d0,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d15,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d15,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d15,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s0,#6' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s0,#1' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p7,s0,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s1,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s30,s0,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s1,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s30,s0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s1,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s30,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d0,#6' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d0,#1' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p7,d0,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d15,d0,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d15,d0,#0' +[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d15,#0' |