[ARC] Add ldbit for nps

This commit adds the ldbit instruction for the NPS-400. The ldbit
instruction uses the same encoding as the ld instruction, but sets
the ZZ field to 11 (which is a reserved setting), and sets the AA
field to 1 or 2 for the x2 and x4 flags respectively.

2 files changed, 66 insertions, 0 deletions

diff --git a/gas/testsuite/gas/arc/nps400-6.d b/gas/testsuite/gas/arc/nps400-6.d
index 19c510b..2edc2b5 100644
--- a/gas/testsuite/gas/arc/nps400-6.d
+++ b/gas/testsuite/gas/arc/nps400-6.d
@@ -308,3 +308,51 @@ Disassembly of section .text:
  604:	595d 0000           	e4by	r0,r1,r2,0,0,0,0x4
  608:	5cbd 394c           	e4by	r7,r12,r13,0x1,0x2,0x3,0x4
  60c:	5cbd a7ff           	e4by	r20,r12,r13,0x7,0x7,0x7,0x7
+ 610:	1100 0980           	ldbit.di	r0,\[r1\]
+ 614:	1101 0980           	ldbit.di	r0,\[r1,1\]
+ 618:	12ff 8981           	ldbit.di	r1,\[r2,-1\]
+ 61c:	1601 7983 ffff ffff 	ldbit.di	r3,\[0xffffffff,1\]
+ 624:	1600 7984 1234 5678 	ldbit.di	r4,\[0x12345678\]
+ 62c:	2636 81c5           	ldbit.di	r5,\[r6,r7\]
+ 630:	2136 9f88 ffff ffff 	ldbit.di	r8,\[r9,0xffffffff\]
+ 638:	2636 f2ca ffff ffff 	ldbit.di	r10,\[0xffffffff,r11\]
+ 640:	1100 09c0           	ldbit.di.cl	r0,\[r1\]
+ 644:	1101 09c0           	ldbit.di.cl	r0,\[r1,1\]
+ 648:	12ff 89c1           	ldbit.di.cl	r1,\[r2,-1\]
+ 64c:	1601 79c3 ffff ffff 	ldbit.di.cl	r3,\[0xffffffff,1\]
+ 654:	1600 79c4 1234 5678 	ldbit.di.cl	r4,\[0x12345678\]
+ 65c:	2637 81c5           	ldbit.di.cl	r5,\[r6,r7\]
+ 660:	2137 9f88 ffff ffff 	ldbit.di.cl	r8,\[r9,0xffffffff\]
+ 668:	2637 f2ca ffff ffff 	ldbit.di.cl	r10,\[0xffffffff,r11\]
+ 670:	1100 0b80           	ldbit.x2.di	r0,\[r1\]
+ 674:	1101 0b80           	ldbit.x2.di	r0,\[r1,1\]
+ 678:	12ff 8b81           	ldbit.x2.di	r1,\[r2,-1\]
+ 67c:	1601 7b83 ffff ffff 	ldbit.x2.di	r3,\[0xffffffff,1\]
+ 684:	1600 7b84 1234 5678 	ldbit.x2.di	r4,\[0x12345678\]
+ 68c:	2676 81c5           	ldbit.x2.di	r5,\[r6,r7\]
+ 690:	2176 9f88 ffff ffff 	ldbit.x2.di	r8,\[r9,0xffffffff\]
+ 698:	2676 f2ca ffff ffff 	ldbit.x2.di	r10,\[0xffffffff,r11\]
+ 6a0:	1100 0bc0           	ldbit.x2.di.cl	r0,\[r1\]
+ 6a4:	1101 0bc0           	ldbit.x2.di.cl	r0,\[r1,1\]
+ 6a8:	12ff 8bc1           	ldbit.x2.di.cl	r1,\[r2,-1\]
+ 6ac:	1601 7bc3 ffff ffff 	ldbit.x2.di.cl	r3,\[0xffffffff,1\]
+ 6b4:	1600 7bc4 1234 5678 	ldbit.x2.di.cl	r4,\[0x12345678\]
+ 6bc:	2677 81c5           	ldbit.x2.di.cl	r5,\[r6,r7\]
+ 6c0:	2177 9f88 ffff ffff 	ldbit.x2.di.cl	r8,\[r9,0xffffffff\]
+ 6c8:	2677 f2ca ffff ffff 	ldbit.x2.di.cl	r10,\[0xffffffff,r11\]
+ 6d0:	1100 0d80           	ldbit.x4.di	r0,\[r1\]
+ 6d4:	1101 0d80           	ldbit.x4.di	r0,\[r1,1\]
+ 6d8:	12ff 8d81           	ldbit.x4.di	r1,\[r2,-1\]
+ 6dc:	1601 7d83 ffff ffff 	ldbit.x4.di	r3,\[0xffffffff,1\]
+ 6e4:	1600 7d84 1234 5678 	ldbit.x4.di	r4,\[0x12345678\]
+ 6ec:	26b6 81c5           	ldbit.x4.di	r5,\[r6,r7\]
+ 6f0:	21b6 9f88 ffff ffff 	ldbit.x4.di	r8,\[r9,0xffffffff\]
+ 6f8:	26b6 f2ca ffff ffff 	ldbit.x4.di	r10,\[0xffffffff,r11\]
+ 700:	1100 0dc0           	ldbit.x4.di.cl	r0,\[r1\]
+ 704:	1101 0dc0           	ldbit.x4.di.cl	r0,\[r1,1\]
+ 708:	12ff 8dc1           	ldbit.x4.di.cl	r1,\[r2,-1\]
+ 70c:	1601 7dc3 ffff ffff 	ldbit.x4.di.cl	r3,\[0xffffffff,1\]
+ 714:	1600 7dc4 1234 5678 	ldbit.x4.di.cl	r4,\[0x12345678\]
+ 71c:	26b7 81c5           	ldbit.x4.di.cl	r5,\[r6,r7\]
+ 720:	21b7 9f88 ffff ffff 	ldbit.x4.di.cl	r8,\[r9,0xffffffff\]
+ 728:	26b7 f2ca ffff ffff 	ldbit.x4.di.cl	r10,\[0xffffffff,r11\]
diff --git a/gas/testsuite/gas/arc/nps400-6.s b/gas/testsuite/gas/arc/nps400-6.s
index 19b0fbe..c10afe6 100644
--- a/gas/testsuite/gas/arc/nps400-6.s
+++ b/gas/testsuite/gas/arc/nps400-6.s
@@ -208,3 +208,21 @@
         e4by            r0,r1,r2,0,0,0,4
         e4by            r7,r12,r13,1,2,3,4
         e4by            r20,r12,r13,7,7,7,7
+
+        .macro ldbit_test mnem
+        \mnem\()        r0,[r1]
+        \mnem\()        r0,[r1,1]
+        \mnem\()        r1,[r2,-1]
+        \mnem\()        r3,[0xffffffff,1]
+        \mnem\()        r4,[0x12345678]
+        \mnem\()        r5,[r6,r7]
+        \mnem\()        r8,[r9,0xffffffff]
+        \mnem\()        r10,[0xffffffff,r11]
+        .endm
+
+        ldbit_test ldbit.di
+        ldbit_test ldbit.di.cl
+        ldbit_test ldbit.x2.di
+        ldbit_test ldbit.x2.di.cl
+        ldbit_test ldbit.x4.di
+        ldbit_test ldbit.x4.di.cl