Support Intel MSRLIST

gas/ChangeLog:

	* NEWS: Support Intel MSRLIST.
	* config/tc-i386.c: Add msrlist.
	* doc/c-i386.texi: Document .msrlist.
	* testsuite/gas/i386/i386.exp: Add MSRLIST tests.
	* testsuite/gas/i386/msrlist-inval.l: New test.
	* testsuite/gas/i386/msrlist-inval.s: Ditto.
	* testsuite/gas/i386/x86-64-msrlist-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-msrlist.d: Ditto.
	* testsuite/gas/i386/x86-64-msrlist.s: Ditto.

opcodes/ChangeLog:

	* i386-dis.c (X86_64_0F01_REG_0_MOD_3_RM_6_P_1): New.
	(X86_64_0F01_REG_0_MOD_3_RM_6_P_3): Ditto.
	(prefix_table): New entry for msrlist.
	(x86_64_table): Add X86_64_0F01_REG_0_MOD_3_RM_6_P_1
	and X86_64_0F01_REG_0_MOD_3_RM_6_P_3.
	* i386-gen.c (cpu_flag_init): Add CPU_MSRLIST_FLAGS
	and CPU_ANY_MSRLIST_FLAGS.
	* i386-init.h: Regenerated.
	* i386-opc.h (CpuMSRLIST): New.
	(i386_cpu_flags): Add cpumsrlist.
	* i386-opc.tbl: Add MSRLIST instructions.
	* i386-tbl.h: Regenerated.

6 files changed, 42 insertions, 0 deletions

diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index b560131..f7cb734 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -482,6 +482,7 @@ if [gas_32_check] then {
     run_list_test "cmpccxadd-inval"
     run_dump_test "wrmsrns"
     run_dump_test "wrmsrns-intel"
+    run_list_test "msrlist-inval"
     run_list_test "sg"
     run_dump_test "clzero"
     run_dump_test "invlpgb"
@@ -1159,6 +1160,8 @@ if [gas_64_check] then {
     run_dump_test "x86-64-cmpccxadd-intel"
     run_dump_test "x86-64-wrmsrns"
     run_dump_test "x86-64-wrmsrns-intel"
+    run_dump_test "x86-64-msrlist"
+    run_dump_test "x86-64-msrlist-intel"
     run_dump_test "x86-64-clzero"
     run_dump_test "x86-64-mwaitx-bdver4"
     run_list_test "x86-64-mwaitx-reg"
diff --git a/gas/testsuite/gas/i386/msrlist-inval.l b/gas/testsuite/gas/i386/msrlist-inval.l
new file mode 100644
index 0000000..456f41c
--- /dev/null
+++ b/gas/testsuite/gas/i386/msrlist-inval.l
@@ -0,0 +1,3 @@
+.* Assembler messages:
+.*:6: Error: `rdmsrlist' is only supported in 64-bit mode
+.*:7: Error: `wrmsrlist' is only supported in 64-bit mode
diff --git a/gas/testsuite/gas/i386/msrlist-inval.s b/gas/testsuite/gas/i386/msrlist-inval.s
new file mode 100644
index 0000000..3c3258a
--- /dev/null
+++ b/gas/testsuite/gas/i386/msrlist-inval.s
@@ -0,0 +1,7 @@
+# Check Illegal MSRLIST instructions
+
+	.allow_index_reg
+	.text
+_start:
+	rdmsrlist		 #MSRLIST
+	wrmsrlist		 #MSRLIST
diff --git a/gas/testsuite/gas/i386/x86-64-msrlist-intel.d b/gas/testsuite/gas/i386/x86-64-msrlist-intel.d
new file mode 100644
index 0000000..b37adb5
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-msrlist-intel.d
@@ -0,0 +1,5 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 MSRLIST insns (Intel disassembly)
+#source: x86-64-msrlist.s
+#dump: x86-64-msrlist.d
diff --git a/gas/testsuite/gas/i386/x86-64-msrlist.d b/gas/testsuite/gas/i386/x86-64-msrlist.d
new file mode 100644
index 0000000..64beed7
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-msrlist.d
@@ -0,0 +1,14 @@
+#as:
+#objdump: -dw
+#name: x86_64 MSRLIST insns
+#source: x86-64-msrlist.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*f2 0f 01 c6\s+rdmsrlist
+\s*[a-f0-9]+:\s*f3 0f 01 c6\s+wrmsrlist
+\s*[a-f0-9]+:\s*f2 0f 01 c6\s+rdmsrlist
+\s*[a-f0-9]+:\s*f3 0f 01 c6\s+wrmsrlist
diff --git a/gas/testsuite/gas/i386/x86-64-msrlist.s b/gas/testsuite/gas/i386/x86-64-msrlist.s
new file mode 100644
index 0000000..45fb452
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-msrlist.s
@@ -0,0 +1,10 @@
+# Check 64bit MSRLIST instructions
+
+	.text
+_start:
+	rdmsrlist		 #MSRLIST
+	wrmsrlist		 #MSRLIST
+
+.intel_syntax noprefix
+	rdmsrlist		 #MSRLIST
+	wrmsrlist		 #MSRLIST