aarch64: Add support for FEAT_SME_F16F16 fcvt and fcvtl instructions.

This patch adds support for FEAT_SME_F16F16 instructions fcvt and fcvtl,
which are available on passing command line flags +sme-f16f16 and the
spec is available here[1].
[1]: https://developer.arm.com/documentation/ddi0602/2024-06/SME-Instructions?lang=en

5 files changed, 90 insertions, 0 deletions

diff --git a/gas/testsuite/gas/aarch64/sme-f16f16-4-bad.d b/gas/testsuite/gas/aarch64/sme-f16f16-4-bad.d
new file mode 100644
index 0000000..2ff075c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-f16f16-4-bad.d
@@ -0,0 +1,4 @@
+#name: Test of invalid FEAT_SME_F16F16 fcvt and fcvtl instructions.
+#as: -march=armv8-a+sme-f16f16
+#source: sme-f16f16-4-bad.s
+#error_output: sme-f16f16-4-bad.l
diff --git a/gas/testsuite/gas/aarch64/sme-f16f16-4-bad.l b/gas/testsuite/gas/aarch64/sme-f16f16-4-bad.l
new file mode 100644
index 0000000..95d1b36
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-f16f16-4-bad.l
@@ -0,0 +1,27 @@
+.*: Assembler messages:
+.*: Error: operand mismatch -- `fcvt { ?z0.d-z1.d ?},z0.h'
+.*: Info:    did you mean this\?
+.*: Info:    	fcvt { ?z0.s-z1.s ?}, z0.h
+.*: Error: start register out of range at operand 1 -- `fcvt { ?z29.s-z30.s ?},z0.h'
+.*: Error: operand mismatch -- `fcvt { ?z0.s-z1.s ?},z31.d'
+.*: Info:    did you mean this\?
+.*: Info:    	fcvt { ?z0.s-z1.s ?}, z31.h
+.*: Error: start register out of range at operand 1 -- `fcvt { ?z15.s-z16.s ?},z31.h'
+.*: Error: operand mismatch -- `fcvt { ?z14.s-z15.s ?},z15.b'
+.*: Info:    did you mean this\?
+.*: Info:    	fcvt { ?z14.s-z15.s ?}, z15.h
+.*: Error: type mismatch in vector register list at operand 1 -- `fcvt { ?z6.s,z7.b ?},z7.h'
+.*: Error: missing type suffix at operand 1 -- `fcvt { ?z2-z3 ?},z3.h'
+.*: Error: operand mismatch -- `fcvtl { ?z0.d-z1.d ?},z0.h'
+.*: Info:    did you mean this\?
+.*: Info:    	fcvtl { ?z0.s-z1.s ?}, z0.h
+.*: Error: start register out of range at operand 1 -- `fcvtl { ?z29.s-z30.s ?},z0.h'
+.*: Error: operand mismatch -- `fcvtl { ?z0.s-z1.s ?},z31.d'
+.*: Info:    did you mean this\?
+.*: Info:    	fcvtl { ?z0.s-z1.s ?}, z31.h
+.*: Error: start register out of range at operand 1 -- `fcvtl { ?z15.s-z16.s ?},z31.h'
+.*: Error: operand mismatch -- `fcvtl { ?z14.s-z15.s ?},z15.b'
+.*: Info:    did you mean this\?
+.*: Info:    	fcvtl { ?z14.s-z15.s ?}, z15.h
+.*: Error: type mismatch in vector register list at operand 1 -- `fcvtl { ?z6.s,z7.b ?},z7.h'
+.*: Error: missing type suffix at operand 1 -- `fcvtl { ?z2-z3 ?},z3.h'
diff --git a/gas/testsuite/gas/aarch64/sme-f16f16-4-bad.s b/gas/testsuite/gas/aarch64/sme-f16f16-4-bad.s
new file mode 100644
index 0000000..046a7de
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-f16f16-4-bad.s
@@ -0,0 +1,18 @@
+/*  FCVT (widening).  */
+fcvt {z0.d - z1.d}, z0.h
+fcvt {z29.s - z30.s}, z0.h
+fcvt {z0.s - z1.s}, z31.d
+fcvt {z15.s - z16.s}, z31.h
+fcvt {z14.s - z15.s}, z15.b
+fcvt {z6.s, z7.b}, z7.h
+fcvt {z2 - z3}, z3.h
+
+/* FCVTL.  */
+fcvtl {z0.d - z1.d}, z0.h
+fcvtl {z29.s - z30.s}, z0.h
+fcvtl {z0.s - z1.s}, z31.d
+fcvtl {z15.s - z16.s}, z31.h
+fcvtl {z14.s - z15.s}, z15.b
+fcvtl {z6.s, z7.b}, z7.h
+fcvtl {z2 - z3}, z3.h
+
diff --git a/gas/testsuite/gas/aarch64/sme-f16f16-4.d b/gas/testsuite/gas/aarch64/sme-f16f16-4.d
new file mode 100644
index 0000000..2fcfb2c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-f16f16-4.d
@@ -0,0 +1,24 @@
+#name: Test of FEAT_SME_F16F16 fcvt and fcvtl instructions.
+#as: -march=armv8-a+sme-f16f16
+#objdump: -dr
+
+[^:]+:     file format .*
+
+
+[^:]+:
+
+[^:]+:
+.*:	c1a0e000 	fcvt	{ ?z0.s-z1.s ?}, z0.h
+.*:	c1a0e01e 	fcvt	{ ?z30.s-z31.s ?}, z0.h
+.*:	c1a0e3e0 	fcvt	{ ?z0.s-z1.s ?}, z31.h
+.*:	c1a0e3fe 	fcvt	{ ?z30.s-z31.s ?}, z31.h
+.*:	c1a0e1ee 	fcvt	{ ?z14.s-z15.s ?}, z15.h
+.*:	c1a0e0e6 	fcvt	{ ?z6.s-z7.s ?}, z7.h
+.*:	c1a0e062 	fcvt	{ ?z2.s-z3.s ?}, z3.h
+.*:	c1a0e001 	fcvtl	{ ?z0.s-z1.s ?}, z0.h
+.*:	c1a0e01f 	fcvtl	{ ?z30.s-z31.s ?}, z0.h
+.*:	c1a0e3e1 	fcvtl	{ ?z0.s-z1.s ?}, z31.h
+.*:	c1a0e3ff 	fcvtl	{ ?z30.s-z31.s ?}, z31.h
+.*:	c1a0e1ef 	fcvtl	{ ?z14.s-z15.s ?}, z15.h
+.*:	c1a0e0e7 	fcvtl	{ ?z6.s-z7.s ?}, z7.h
+.*:	c1a0e063 	fcvtl	{ ?z2.s-z3.s ?}, z3.h
diff --git a/gas/testsuite/gas/aarch64/sme-f16f16-4.s b/gas/testsuite/gas/aarch64/sme-f16f16-4.s
new file mode 100644
index 0000000..26e76c6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme-f16f16-4.s
@@ -0,0 +1,17 @@
+/*  FCVT (widening).  */
+fcvt {z0.s - z1.s}, z0.h
+fcvt {z30.s - z31.s}, z0.h
+fcvt {z0.s - z1.s}, z31.h
+fcvt {z30.s - z31.s}, z31.h
+fcvt {z14.s - z15.s}, z15.h
+fcvt {z6.s - z7.s}, z7.h
+fcvt {z2.s - z3.s}, z3.h
+
+/* FCVTL.  */
+fcvtl {z0.s - z1.s}, z0.h
+fcvtl {z30.s - z31.s}, z0.h
+fcvtl {z0.s - z1.s}, z31.h
+fcvtl {z30.s - z31.s}, z31.h
+fcvtl {z14.s - z15.s}, z15.h
+fcvtl {z6.s - z7.s}, z7.h
+fcvtl {z2.s - z3.s}, z3.h