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author | Jan Beulich <jbeulich@suse.com> | 2020-02-17 08:56:18 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2020-02-17 08:56:18 +0100 |
commit | b9915cbc7d3ac2b9cd136248defbf9538b9a9bcf (patch) | |
tree | f99be238a8f95c1690e68193c96df0028da708ae /gas/flonum.h | |
parent | ce504911e5c4068a3498eebde4064b24382c7598 (diff) | |
download | gdb-b9915cbc7d3ac2b9cd136248defbf9538b9a9bcf.zip gdb-b9915cbc7d3ac2b9cd136248defbf9538b9a9bcf.tar.gz gdb-b9915cbc7d3ac2b9cd136248defbf9538b9a9bcf.tar.bz2 |
x86/Intel: improve diagnostics for ambiguous VCVT* operands
Conversions which shrink element size and which have a memory source
can't be disambiguated between their 128- and 256-bit variants by
looking at the register operand. "operand size mismatch", however, is a
pretty misleading diagnostic. Generalize the logic introduced for
VFPCLASSP{S,D} such that, with suitable similar adjustments to the
respective templates, it'll cover these cases too.
For VCVTNEPS2BF16 also fold the two previously separate AVX512VL
templates to achieve the intended effect. This is then also accompanied
by a respective addition to the inval-avx512f testcase.
Diffstat (limited to 'gas/flonum.h')
0 files changed, 0 insertions, 0 deletions