* doc/c-mips.tex (-mgp32, -mfp32): Added -mfp32, unified with -mgp32.

	* config/tc-mips.c (mips_fp32, mips_32bit_abi): New static variables.
	(md_long_opts): Add -mfp32 option.
	(md_parse_option): Handle it.  Set mips_32bit_abi given -mabi=32.
	(md_show_usage): Show usage for -mfp32 and -mgp32.
	(HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): New macros.
	(HAVE_64BIT_GPRS, HAVE_64BIT_FPRS): New macros, inverse of the above.
	(HAVE_32BIT_ADDRESSES): New macro.
	(load_register): Use HAVE_32BIT_GPRS to determine the register width.
	(load_address): Use HAVE_32BIT_ADDRESSES to determine the address size.
	(s_cprestore, s_cpadd): Likewise.
	(macro): Use HAVE_32BIT_GPRS to determine the width of registers
	used in branch and M_LI_D macros.  Use HAVE_64BIT_FPRS to determine
	the width registers used in M_LI_DD macros.  Use HAVE_32BIT_ADDRESSES
	to determine the width of addresses in load, store and jump macros.
	(macro2): Use HAVE_32BIT_GPRS to determine the width of registers
	used in set instructions; do not check the address size for them.
	Use HAVE_32BIT_ADDRESSES to determine the width of addresses in
	unaligned load and store macros.
	(mips_ip): Use the new macros to check the width of a register when
	processing float constants.  Force a constant into memory if it is
	destined for an FPR and the FPRs are wider than the GPRs.  Warn about
	odd FPR numbers if HAVE_32BIT_FPRS.  Use HAVE_32BIT_GPRS rather
	than mips_gp32 to select synthetic instructions.
	(macro_build): Use HAVE_32BIT_GPRS rather than mips_gp32 to select
	synthetic instructions.

1 files changed, 11 insertions, 7 deletions

diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 87d5d2f..a114fee 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -75,13 +75,17 @@ instruction sets during the assembly; see @ref{MIPS ISA, Directives to
 override the ISA level}.
 
 @item -mgp32
-Assume that 32-bit general purpose registers are available.  This
-affects synthetic instructions such as @code{move}, which will assemble
-to a 32-bit or a 64-bit instruction depending on this flag.  On some
-MIPS variants there is a 32-bit mode flag; when this flag is set,
-64-bit instructions generate a trap.  Also, some 32-bit OSes only save
-the 32-bit registers on a context switch, so it is essential never to
-use the 64-bit registers.
+@itemx -mfp32
+Some macros have different expansions for 32-bit and 64-bit registers.
+The register sizes are normally inferred from the ISA and ABI, but these
+flags force a certain group of registers to be treated as 32 bits wide at
+all times.  @samp{-mgp32} controls the size of general-purpose registers
+and @samp{-mfp32} controls the size of floating-point registers.
+
+On some MIPS variants there is a 32-bit mode flag; when this flag is
+set, 64-bit instructions generate a trap.  Also, some 32-bit OSes only
+save the 32-bit registers on a context switch, so it is essential never
+to use the 64-bit registers.
 
 @item -mgp64
 Assume that 64-bit general purpose registers are available.  This is