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author | Nelson Chu <nelson@rivosinc.com> | 2023-09-07 10:52:25 +0800 |
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committer | Nelson Chu <nelson@rivosinc.com> | 2023-09-07 11:45:01 +0800 |
commit | 6de11ff67a925a496319d25dee0bea58427aacf6 (patch) | |
tree | f3b8e8134fde110c2ab5ae00898706c53bab7c05 /gas/doc | |
parent | 5e9091dab8858b25210a91d22fbbbfdee9c969ad (diff) | |
download | gdb-6de11ff67a925a496319d25dee0bea58427aacf6.zip gdb-6de11ff67a925a496319d25dee0bea58427aacf6.tar.gz gdb-6de11ff67a925a496319d25dee0bea58427aacf6.tar.bz2 |
RISC-V: Clarify the naming rules of vendor operands.
The vendor operands should be named starting with `X', and preferably the
second letter (or multiple following letters) is enough to differentiate
them from other vendors.
Therefore, added letter `t' after `X' for t-head operands, to differentiate
from future different vendor's operands.
bfd/
* elfxx-riscv.c (riscv_supported_vendor_x_ext): Removed the vendor
document link since it should already be recorded in the
gas/doc/c-riscv.texi.
gas/
* config/tc-riscv.c (validate_riscv_insn): Added `t' after `X' for
t-head operands. Minor updates for indents and comments.
(riscv_ip): Likewise.
* doc/c-riscv.texi: Minor updates.
opcodes/
* riscv-dis.c (print_insn_args): Added `t' after `X' for t-head
operands. Minor updates for indents and comments.
* riscv-opc.c (riscv_opcode): Likewise.
Diffstat (limited to 'gas/doc')
-rw-r--r-- | gas/doc/c-riscv.texi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi index b175ba0..7921556 100644 --- a/gas/doc/c-riscv.texi +++ b/gas/doc/c-riscv.texi @@ -804,11 +804,12 @@ It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/rel The XTheadSync extension provides instructions for multi-processor synchronization. It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf}. + @item XVentanaCondOps XVentanaCondOps extension provides instructions for branchless sequences that perform conditional arithmetic, conditional bitwise-logic, and conditional select operations. -It is documented at @url{https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.0/ventana-custom-extensions-v1.0.0.pdf}. +It is documented in @url{https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.0/ventana-custom-extensions-v1.0.0.pdf}. @end table |