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author | Peter Bergner <bergner@vnet.ibm.com> | 2013-01-11 02:25:36 +0000 |
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committer | Peter Bergner <bergner@vnet.ibm.com> | 2013-01-11 02:25:36 +0000 |
commit | 5817ffd1f81cf2d2ae173071775e6e620aa41283 (patch) | |
tree | b2c4d4547a74f4de494daeae67436a970460e3d3 /gas/doc | |
parent | ca9c6ee2b7740e92a1630a9c7040eaba557bcd49 (diff) | |
download | gdb-5817ffd1f81cf2d2ae173071775e6e620aa41283.zip gdb-5817ffd1f81cf2d2ae173071775e6e620aa41283.tar.gz gdb-5817ffd1f81cf2d2ae173071775e6e620aa41283.tar.bz2 |
include/opcode/
* ppc.h (PPC_OPCODE_POWER8): New define.
(PPC_OPCODE_HTM): Likewise.
opcodes/
* ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries.
* ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK,
XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines.
(SH6): Update.
<"tabort.", "tabortdc.", "tabortdci.", "tabortwc.",
"tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.",
"treclaim.", "tsr.">: Add POWER8 HTM opcodes.
<"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes.
gas/
* doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
* config/tc-ppc.c (md_show_usage): Likewise.
(ppc_handle_align): Handle power8's group ending nop.
gas/testsuite/
* gas/ppc/htm.d: New test.
* gas/ppc/htm.s: Likewise.
* gas/ppc/power8.d: Likewise.
* gas/ppc/power8.s: Likewise.
* gas/ppc/ppc.exp: Run them.
Diffstat (limited to 'gas/doc')
-rw-r--r-- | gas/doc/as.texinfo | 4 | ||||
-rw-r--r-- | gas/doc/c-ppc.texi | 7 |
2 files changed, 9 insertions, 2 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index 0d04932..c976c05 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -451,8 +451,8 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. @b{-m440}|@b{-m464}|@b{-m476}|@b{-m7400}|@b{-m7410}|@b{-m7450}|@b{-m7455}|@b{-m750cl}|@b{-mppc64}| @b{-m620}|@b{-me500}|@b{-e500x2}|@b{-me500mc}|@b{-me500mc64}|@b{-me5500}|@b{-me6500}|@b{-mppc64bridge}| @b{-mbooke}|@b{-mpower4}|@b{-mpwr4}|@b{-mpower5}|@b{-mpwr5}|@b{-mpwr5x}|@b{-mpower6}|@b{-mpwr6}| - @b{-mpower7}|@b{-mpwr7}|@b{-ma2}|@b{-mcell}|@b{-mspe}|@b{-mtitan}|@b{-me300}|@b{-mvle}|@b{-mcom}] - [@b{-many}] [@b{-maltivec}|@b{-mvsx}] + @b{-mpower7}|@b{-mpwr7}|@b{-mpower8}|@b{-mpwr8}|@b{-ma2}|@b{-mcell}|@b{-mspe}|@b{-mtitan}|@b{-me300}|@b{-mcom}] + [@b{-many}] [@b{-maltivec}|@b{-mvsx}|@b{-mhtm}|@b{-mvle}] [@b{-mregnames}|@b{-mno-regnames}] [@b{-mrelocatable}|@b{-mrelocatable-lib}|@b{-K PIC}] [@b{-memb}] [@b{-mlittle}|@b{-mlittle-endian}|@b{-le}|@b{-mbig}|@b{-mbig-endian}|@b{-be}] diff --git a/gas/doc/c-ppc.texi b/gas/doc/c-ppc.texi index 9fb9614..c2209ed 100644 --- a/gas/doc/c-ppc.texi +++ b/gas/doc/c-ppc.texi @@ -121,6 +121,9 @@ Generate code for Freescale PowerPC VLE instructions. @item -mvsx Generate code for processors with Vector-Scalar (VSX) instructions. +@item -mhtm +Generate code for processors with Hardware Transactional Memory instructions. + @item -mpower4, -mpwr4 Generate code for Power4 architecture. @@ -133,6 +136,10 @@ Generate code for Power6 architecture. @item -mpower7, -mpwr7 Generate code for Power7 architecture. +@item -mpower8, -mpwr8 +Generate code for Power8 architecture. + +@item -mcell @item -mcell Generate code for Cell Broadband Engine architecture. |