diff options
| author | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2023-11-16 12:18:28 +0000 |
|---|---|---|
| committer | srinath <srinath.parvathaneni@arm.com> | 2023-11-16 12:18:34 +0000 |
| commit | 311276f10c4f85827d3264a2682ae9219917060f (patch) | |
| tree | 22824b06a8cd530256bad14437b55f92b2ba8c7d /gas/doc | |
| parent | 43e228e98c33d3dbb428f4061de0362ba13ffbf5 (diff) | |
| download | gdb-311276f10c4f85827d3264a2682ae9219917060f.zip gdb-311276f10c4f85827d3264a2682ae9219917060f.tar.gz gdb-311276f10c4f85827d3264a2682ae9219917060f.tar.bz2 | |
aarch64: Add support to new features in RAS extension.
This patch also adds support for:
1. FEAT_RASv2 feature and "ERXGSR_EL1" system register.
RASv2 feature is enabled by passing +rasv2 to -march
(eg: -march=armv8-a+rasv2).
2. FEAT_SCTLR2 and following system registers.
SCTLR2_EL1, SCTLR2_EL12, SCTLR2_EL2 and SCTLR2_EL3.
3. FEAT_FGT2 and following system registers.
HDFGRTR2_EL2, HDFGWTR2_EL2, HFGRTR2_EL2, HFGWTR2_EL2
4. FEAT_PFAR and following system registers.
PFAR_EL1, PFAR_EL2 and PFAR_EL12.
FEAT_RASv2, FEAT_SCTLR2, FEAT_FGT2 and FEAT_PFAR features are by default
enabled from Armv9.4-A architecture.
This patch also adds support for two read only system registers
id_aa64mmfr3_el1 and id_aa64mmfr4_el1, which are available from
Armv8-A Architecture.
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-aarch64.texi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 81c1818..cbf06bf 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -267,7 +267,8 @@ automatically cause those extensions to be disabled. @tab Enable Translation Hardening extension. @item @code{lse128} @tab Armv9.4-A @tab No @tab Enable the 128-bit Atomic Instructions extension. This implies @code{lse}. - +@item @code{rasv2} @tab N/A @tab Armv9.4-A or later + @tab Enable the Reliability, Availability and Serviceability extension v2. @end multitable @node AArch64 Syntax |