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authorChris Demetriou <cgd@google.com>2002-03-16 03:09:19 +0000
committerChris Demetriou <cgd@google.com>2002-03-16 03:09:19 +0000
commit1f25f5d300a19ce6256f5d08ffe3c89dac61eca5 (patch)
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parent376c9600197cb583397c4bf8a2cd49e23693bf6d (diff)
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[ gas/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mips3d" member. (mips_opts): Initialize "ase_mips3d" member. (file_ase_mips3d): New variable. (CPU_HAS_MIPS3D): New macro. (md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d based on command line options and configuration defaults. (macro_build, mips_ip): Accept MIPS-3D instructions if mips_opts.ase_mips3d is set. (OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option): Add support for "-mips3d" and "-no-mips3d" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mips3d" and ".set nomips3d". (mips_elf_final_processing): Add a comment indicating that a MIPS-3D ASE ELF header flag should be set, when one exists. * doc/as.texinfo: Document -mips3d and -no-mips3d options. * doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set nomips3d" directives. [ gas/testsuite/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mips3d.s: New file. * gas/mips/mips64-mips3d.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mips3d" test. [ include/opcode/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D instructions. (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks may be passed along with the ISA bitmask. [ opcodes/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that indicate that they should dissassemble all applicable MIPS-specified ASEs. * mips-opc.c: Add support for MIPS-3D instructions. (M3D): New definition. * mips-opc.c: Update copyright years.
Diffstat (limited to 'gas/doc')
-rw-r--r--gas/doc/as.texinfo7
-rw-r--r--gas/doc/c-mips.texi19
2 files changed, 26 insertions, 0 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index b6c14fa..2a1d05e 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -374,6 +374,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-mips1}] [@b{-mips2}] [@b{-mips3}] [@b{-mips4}] [@b{-mips5}]
[@b{-mips32}] [@b{-mips64}]
[@b{-m4650}] [@b{-no-m4650}]
+ [@b{-mips3d}] [@b{-no-mips3d}]
[@b{--trap}] [@b{--break}] [@b{-n}]
[@b{--emulation}=@var{name} ]
@end ifset
@@ -881,6 +882,12 @@ the @samp{mad} and @samp{madu} instruction, and to not schedule @samp{nop}
instructions around accesses to the @samp{HI} and @samp{LO} registers.
@samp{-no-m4650} turns off this option.
+@item -mips3d
+@itemx -no-mips3d
+Generate code for the MIPS-3D Application Specific Extension.
+This tells the assembler to accept MIPS-3D instructions.
+@samp{-no-mips3d} turns off this option.
+
@item -mcpu=@var{CPU}
Generate code for a particular MIPS cpu. It is exactly equivalent to
@samp{-m@var{cpu}}, except that there are more value of @var{cpu}
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index a114fee..1fbe180 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -97,6 +97,12 @@ Generate code for the MIPS 16 processor. This is equivalent to putting
@samp{.set mips16} at the start of the assembly file. @samp{-no-mips16}
turns off this option.
+@item -mips3d
+@itemx -no-mips3d
+Generate code for the MIPS-3D Application Specific Extension.
+This tells the assembler to accept MIPS-3D instructions.
+@samp{-no-mips3d} turns off this option.
+
@item -mfix7000
@itemx -no-mfix7000
Cause nops to be inserted if the read of the destination register
@@ -323,3 +329,16 @@ option such as the ISA level or instruction reordering but does not want
to change the state of the code which invoked the macro.
Traditional @sc{mips} assemblers do not support these directives.
+
+@node MIPS ASE instruction generation overrides
+@section Directives to control generation of MIPS ASE instructions
+
+@cindex MIPS MIPS-3D instruction generation override
+@kindex @code{.set mips3d}
+@kindex @code{.set nomips3d}
+The directive @code{.set mips3d} makes the assembler accept instructions
+from the MIPS-3D Application Specific Extension from that point on
+in the assembly. The @code{.set nomips3d} directive prevents MIPS-3D
+instructions from being accepted.
+
+Traditional @sc{mips} assemblers do not support these directives.