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| author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-07-26 11:38:04 +0200 |
|---|---|---|
| committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-07-26 11:38:04 +0200 |
| commit | 04896832b2e79c042ea1f510b0458ac342512152 (patch) | |
| tree | f1657eebb830604f82dcb4f731afd8143d9cc69d /gas/doc/c-bpf.texi | |
| parent | 477c9f2ba26ccd77016f2c97941fc8b35e332e35 (diff) | |
| download | gdb-04896832b2e79c042ea1f510b0458ac342512152.zip gdb-04896832b2e79c042ea1f510b0458ac342512152.tar.gz gdb-04896832b2e79c042ea1f510b0458ac342512152.tar.bz2 | |
bpf: fix register NEG[32] instructions
This patch fixes the BPF_INSN_NEGR and BPF_INSN_NEG32R BPF
instructions to not use their source registers.
Tested in bpf-unknown-none.
opcodes/ChangeLog:
2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf-opc.c (bpf_opcodes): Fix BPF_INSN_NEGR to not use a src
register.
gas/ChangeLog:
2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/alu.s: The register neg instruction gets only
one argument.
* testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-be.d: Likewise.
* testsuite/gas/bpf/alu.d: Likewise.
* testsuite/gas/bpf/alu32-be.d: Likewise.
* testsuite/gas/bpf/alu32.d: Likewise.
* testsuite/gas/bpf/alu32.s: Likewise.
* doc/c-bpf.texi (BPF Instructions): Update accordingly.
Diffstat (limited to 'gas/doc/c-bpf.texi')
| -rw-r--r-- | gas/doc/c-bpf.texi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gas/doc/c-bpf.texi b/gas/doc/c-bpf.texi index 8f39ab3..6683ff9 100644 --- a/gas/doc/c-bpf.texi +++ b/gas/doc/c-bpf.texi @@ -244,9 +244,9 @@ registers. @itemx rd s>>= imm32 64-bit right arithmetic shift, by @code{rs} or @code{imm32} bits. -@item neg rd, rs +@item neg rd @itemx neg rd, imm32 -@itemx rd = - rs +@itemx rd = - rd @itemx rd = - imm32 64-bit arithmetic negation. @@ -351,9 +351,9 @@ in the same instruction. @itemx rd s>>= imm32 32-bit right arithmetic shift, by @code{rs} or @code{imm32} bits. -@item neg32 rd, rs +@item neg32 rd @itemx neg32 rd, imm32 -@itemx rd = - rs +@itemx rd = - rd @itemx rd = - imm32 32-bit arithmetic negation. |