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author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:10 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:10 +0100 |
commit | 60336e19658f1b820753ac09797f14b26e594cfa (patch) | |
tree | fa19c746ec4f0f8639a847697c59a2195f2c8826 /gas/doc/c-aarch64.texi | |
parent | 4eede8c2442115513a3f0c4f3610fbd6fe919a58 (diff) | |
download | gdb-60336e19658f1b820753ac09797f14b26e594cfa.zip gdb-60336e19658f1b820753ac09797f14b26e594cfa.tar.gz gdb-60336e19658f1b820753ac09797f14b26e594cfa.tar.bz2 |
aarch64: Add +sme2
This patch adds bare-bones support for +sme2. Later patches
fill in the rest.
Diffstat (limited to 'gas/doc/c-aarch64.texi')
-rw-r--r-- | gas/doc/c-aarch64.texi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 3921c0d..acde4a7 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -235,6 +235,8 @@ automatically cause those extensions to be disabled. @tab Enable SME F64F64 Extension. @item @code{sme-i16i64} @tab Armv9-A @tab No @tab Enable SME I16I64 Extension. +@item @code{sme2} @tab Armv9-A @tab No + @tab Enable SME2. This implies @code{sme}. @item @code{ssbs} @tab ARMv8-A @tab ARMv8.5-A or later @tab Enable Speculative Store Bypassing Safe state read and write. @item @code{sve} @tab ARMv8.2-A @tab Armv9-A or later |