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author | Claudiu Zissulescu <claziss@synopsys.com> | 2023-09-25 10:55:51 +0300 |
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committer | Claudiu Zissulescu <claziss@gmail.com> | 2023-09-25 10:55:51 +0300 |
commit | f3d38d7d0b7346515ba603454feeddc58a3fc451 (patch) | |
tree | 8a059a908c241301965ccc08e2689b9fe3edd817 /gas/configure | |
parent | 04414221df53bb5129e34bec354dae3121db436a (diff) | |
download | gdb-f3d38d7d0b7346515ba603454feeddc58a3fc451.zip gdb-f3d38d7d0b7346515ba603454feeddc58a3fc451.tar.gz gdb-f3d38d7d0b7346515ba603454feeddc58a3fc451.tar.bz2 |
arc: Update ARC's Gnu Assembler backend with ARCv3 ISA.
The new Synopsys ARCv3 ISA has a similar instruction format like
the old ARCv1 and ARCv2 ISA. Thus, the ARCv3 addition is using
whatever we have for old ARC processors plus some ARCv3 spcific mods.
To distinguish between various ARC variants, we introduced two new
configure defines named TARGET_ARCv3_32 and TARGET_ARCv3_64 which are
set when we choose either an ARC32 (ARCv3/32) ISA toolchain or an
ARC64 (ARCv3/64) ISA toolchain.
gas/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gas/config/tc-arc.h: Selectively define default target macros.
* gas/configure.ac: Add ARC64 target.
* gas/configure.tgt: Likewise.
* gas/configure: Regenerate
* gas/config.in: Regenerate.
* gas/config/tc-arc.c (DEFAULT_ARCH): New macro.
(default_arch): New variable.
(md_pseudo_table): Add xword.
(md_shortopts): Only a few options are recognized by the new ARC64
assembler.
(md_longopts): Likewise.
(ARC_CPU_TYPE_A64x): New define.
(ARC_CPU_TYPE_A32x): Likewise.
(cpu_type): New arch field.
(selected_cpu): Update fields.
(arc_opcode_hash_entry_iterator_init): Formating.
(arc_opcode_hash_entry_iterator_next): Likewise.
(arc_select_cpu): Likewise.
(arc_option): Likewise.
(check_cpu_feature): Likewise.
(debug_exp): Recognize new expression operands.
(parse_reloc_symbol): Parse new signed/unsigend cases.
(parse_opcode_flags): Update for the case when the flags needs
insert/extract functions.
(find_opcode_match): Match new signed/unsigned 32-bit immediates.
(autodetect_attributes): PLT34 only available for ARC64.
(md_assemble): Extend match characters.
(declare_fp_set): New function.
(init_default_arch): Likewise.
(md_begin): Detect and initialize the correct CPU and coresponding
registers.
(md_pcrel_from_section): Add new relocs.
(arc_target_format): New function.
(md_apply_fix): Add new relocs.
(md_parse_option): Update options.
(arc_show_cpu_list): Update with ARC64 cpus.
(md_show_usage): Update messages.
(may_relax_expr): Add PLT34 case.
(assemble_insn): Update for ARC64.
(arc_make_nops): New function.
(arc_handle_align): Refurbish this function, use arc_make_nops.
(tc_arc_fix_adjustable): Update messages.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
Diffstat (limited to 'gas/configure')
-rwxr-xr-x | gas/configure | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/gas/configure b/gas/configure index 3c80fe5..b1a06bb 100755 --- a/gas/configure +++ b/gas/configure @@ -12100,6 +12100,18 @@ cat >>confdefs.h <<_ACEOF _ACEOF ;; + arc64) + # Set for which architecture we compile + +$as_echo "#define TARGET_ARCv3_64 1" >>confdefs.h + + ;; + arc32) + # Set for which architecture we compile + +$as_echo "#define TARGET_ARCv3_32 1" >>confdefs.h + + ;; esac if test ${this_target} = $target ; then @@ -12523,7 +12535,7 @@ $as_echo "#define NDS32_DEFAULT_ZOL_EXT 1" >>confdefs.h $as_echo "$enable_zol_ext" >&6; } ;; - aarch64 | i386 | s390 | sparc) + aarch64 | i386 | s390 | sparc | arc) if test $this_target = $target ; then cat >>confdefs.h <<_ACEOF |