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| author | Cui, Lili <lili.cui@intel.com> | 2022-10-31 21:07:17 +0800 |
|---|---|---|
| committer | Cui,Lili <lili.cui@intel.com> | 2022-10-31 21:15:29 +0800 |
| commit | ef07be453e0edf2f43034fcbc0581f61e630993e (patch) | |
| tree | eb13c80fe4c9c495fdd74bbf6bb32aaa463c5f6a /gas/config | |
| parent | 1e7416363963e27c8d122bee2397d4b48a482ec3 (diff) | |
| download | gdb-ef07be453e0edf2f43034fcbc0581f61e630993e.zip gdb-ef07be453e0edf2f43034fcbc0581f61e630993e.tar.gz gdb-ef07be453e0edf2f43034fcbc0581f61e630993e.tar.bz2 | |
Support Intel PREFETCHI
gas/ChangeLog:
* NEWS: Add support for Intel PREFETCHI instruction.
* config/tc-i386.c (load_insn_p): Use prefetch* to fold all prefetches.
(md_assemble): Add warning for illegal input of PREFETCHI.
* doc/c-i386.texi: Document .prefetchi.
* testsuite/gas/i386/i386.exp: Run PREFETCHI tests.
* testsuite/gas/i386/x86-64-lfence-load.d: Add PREFETCHI.
* testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
* testsuite/gas/i386/x86-64-prefetch.d: New test.
* testsuite/gas/i386/x86-64-prefetchi-intel.d: Likewise.
* testsuite/gas/i386/x86-64-prefetchi-inval-register.d: Likewise..
* testsuite/gas/i386/x86-64-prefetchi-inval-register.s: Likewise.
* testsuite/gas/i386/x86-64-prefetchi-warn.l: Likewise.
* testsuite/gas/i386/x86-64-prefetchi-warn.s: Likewise.
* testsuite/gas/i386/x86-64-prefetchi.d: Likewise.
* testsuite/gas/i386/x86-64-prefetchi.s: Likewise.
opcodes/ChangeLog:
* i386-dis.c (reg_table): Add MOD_0F18_REG_6 and MOD_0F18_REG_7
(x86_64_table): Add X86_64_0F18_REG_6_MOD_0 and X86_64_0F18_REG_7_MOD_0.
(mod_table): Add MOD_0F18_REG_6 and MOD_0F18_REG_7.
(prefix_table): Add PREFIX_0F18_REG_6_MOD_0_X86_64 and
PREFIX_0F18_REG_7_MOD_0_X86_64.
(PREFETCHI_Fixup): New.
* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHI_FLAGS.
(cpu_flags): Add CpuPREFETCHI.
* i386-opc.h (CpuPREFETCHI): New.
(i386_cpu_flags): Add cpuprefetchi.
* i386-opc.tbl: Add Intel PREFETCHI instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index df83d4b..fb1ce75 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1095,6 +1095,7 @@ static const arch_entry cpu_arch[] = SUBARCH (uintr, UINTR, ANY_UINTR, false), SUBARCH (hreset, HRESET, ANY_HRESET, false), SUBARCH (avx512_fp16, AVX512_FP16, ANY_AVX512_FP16, false), + SUBARCH (prefetchi, PREFETCHI, PREFETCHI, false), }; #undef SUBARCH @@ -4496,9 +4497,8 @@ load_insn_p (void) if (!any_vex_p) { - /* Anysize insns: lea, invlpg, clflush, prefetchnta, prefetcht0, - prefetcht1, prefetcht2, prefetchtw, bndmk, bndcl, bndcu, bndcn, - bndstx, bndldx, prefetchwt1, clflushopt, clwb, cldemote. */ + /* Anysize insns: lea, invlpg, clflush, prefetch*, bndmk, bndcl, bndcu, + bndcn, bndstx, bndldx, clflushopt, clwb, cldemote. */ if (i.tm.opcode_modifier.anysize) return 0; @@ -5033,6 +5033,11 @@ md_assemble (char *line) if (!process_suffix ()) return; + /* Check if IP-relative addressing requirements can be satisfied. */ + if (i.tm.cpu_flags.bitfield.cpuprefetchi + && !(i.base_reg && i.base_reg->reg_num == RegIP)) + as_warn (_("only support RIP-relative address"), i.tm.name); + /* Update operand types and check extended states. */ for (j = 0; j < i.operands; j++) { |