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authorRichard Earnshaw <richard.earnshaw@arm.com>2012-12-20 16:19:53 +0000
committerRichard Earnshaw <richard.earnshaw@arm.com>2012-12-20 16:19:53 +0000
commitd709e4e6c73d646981ae1f1a8e42c35bab703f76 (patch)
tree8605ac4778b6dc526ae3f2972acfc70c3b92a48a /gas/config
parent29f5339515927dd3928d88ce5d270f0ffda4bf3a (diff)
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2012-12-20 Greta Yorsh <Greta.Yorsh@arm.com>
* config/tc-arm.c (rfefa,rfeea,rfeed): Fix encoding. (rfe,srs,srsea,srsfa,srsed,srsfd): Add missing mnemonics. * gas/arm/srs-t2.s: Add tests for missing srs modes. * gas/arm/srs-t2.l: Update expected output. * gas/arm/srs-arm.s: Add tests for missing srs modes. * gas/arm/srs-arm.l: Update expected output. * gas/arm/archv6.s: Add tests for missing rfe modes. * gas/arm/archv6.d: Update expected output.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-arm.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 2841abb..80c06dc 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -18189,17 +18189,23 @@ static const struct asm_opcode insns[] =
#undef THUMB_VARIANT
#define THUMB_VARIANT & arm_ext_v6_notm
TUF("rfeia", 8900a00, e990c000, 1, (RRw), rfe, rfe),
+ TUF("rfe", 8900a00, e990c000, 1, (RRw), rfe, rfe),
UF(rfeib, 9900a00, 1, (RRw), rfe),
UF(rfeda, 8100a00, 1, (RRw), rfe),
TUF("rfedb", 9100a00, e810c000, 1, (RRw), rfe, rfe),
TUF("rfefd", 8900a00, e990c000, 1, (RRw), rfe, rfe),
- UF(rfefa, 9900a00, 1, (RRw), rfe),
- UF(rfeea, 8100a00, 1, (RRw), rfe),
- TUF("rfeed", 9100a00, e810c000, 1, (RRw), rfe, rfe),
+ UF(rfefa, 8100a00, 1, (RRw), rfe),
+ TUF("rfeea", 9100a00, e810c000, 1, (RRw), rfe, rfe),
+ UF(rfeed, 9900a00, 1, (RRw), rfe),
TUF("srsia", 8c00500, e980c000, 2, (oRRw, I31w), srs, srs),
+ TUF("srs", 8c00500, e980c000, 2, (oRRw, I31w), srs, srs),
+ TUF("srsea", 8c00500, e980c000, 2, (oRRw, I31w), srs, srs),
UF(srsib, 9c00500, 2, (oRRw, I31w), srs),
+ UF(srsfa, 9c00500, 2, (oRRw, I31w), srs),
UF(srsda, 8400500, 2, (oRRw, I31w), srs),
+ UF(srsed, 8400500, 2, (oRRw, I31w), srs),
TUF("srsdb", 9400500, e800c000, 2, (oRRw, I31w), srs, srs),
+ TUF("srsfd", 9400500, e800c000, 2, (oRRw, I31w), srs, srs),
/* ARM V6 not included in V7M (eg. integer SIMD). */
#undef THUMB_VARIANT