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authorMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2012-08-24 08:02:09 +0000
committerMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2012-08-24 08:02:09 +0000
commitb79f7053dd3e33f7b5e61bac1f94be303b14fe77 (patch)
tree66f9c332aff71a14104a5cbded152d0b7071d9cf /gas/config
parent53c4b28b4f873fd41d158eb9f23b2d07e2780b98 (diff)
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* gas/config/tc-arm.c (insns): Add DCPS instruction.
* gas/testsuite/gas/arm/armv8-a.d: Update. * gas/testsuite/gas/arm/armv8-a.s: Likewise. * opcodes/arm-dis.c (thumb32_opcodes): Add DCPS instruction.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-arm.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index cfcdecb..1c5eb31 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -17975,6 +17975,12 @@ static const struct asm_opcode insns[] =
tCE("sevl", 320f005, _sevl, 0, (), noargs, t_hint),
+#undef ARM_VARIANT
+#define ARM_VARIANT NULL
+ TUF("dcps1", 0, f78f8001, 0, (), noargs, noargs),
+ TUF("dcps2", 0, f78f8002, 0, (), noargs, noargs),
+ TUF("dcps3", 0, f78f8003, 0, (), noargs, noargs),
+
#undef ARM_VARIANT
#define ARM_VARIANT & fpu_fpa_ext_v1 /* Core FPA instruction set (V1). */
#undef THUMB_VARIANT