diff options
| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-04-25 17:02:06 +0200 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-04-26 23:34:04 +0200 |
| commit | a914a7c95895161c99533d5919b8504b37ea54a0 (patch) | |
| tree | e2ef68914a5cd764b89865190ce40a0c3e899b28 /gas/config | |
| parent | 0df8ad28f0f727fab3a696d6c98b9a8a77ee1024 (diff) | |
| download | gdb-a914a7c95895161c99533d5919b8504b37ea54a0.zip gdb-a914a7c95895161c99533d5919b8504b37ea54a0.tar.gz gdb-a914a7c95895161c99533d5919b8504b37ea54a0.tar.bz2 | |
Enable Intel MOVDIRI, MOVDIR64B instructions.
gas/
* config/tc-i386.c (cpu_arch): Add .movdir, .movdir64b.
(cpu_noarch): Likewise.
(process_suffix): Add check for register size.
* doc/c-i386.texi: Document movdiri, movdir64b.
* testsuite/gas/i386/i386.exp: Run MOVDIR{I,64B} tests.
* testsuite/gas/i386/movdir-intel.d: New test.
* testsuite/gas/i386/movdir.d: Likewise.
* testsuite/gas/i386/movdir.s: Likewise.
* testsuite/gas/i386/movdir64b-reg.s: Likewise.
* testsuite/gas/i386/movdir64b-reg.l: Likewise.
* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.s: Likewise.
* testsuite/gas/i386/x86-64-movdir64b-reg.s: Likewise.
* testsuite/gas/i386/x86-64-movdir64b-reg.l: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_0F38F8, PREFIX_0F38F9.
(prefix_table): New instructions (see prefix above).
Add Gva macro and handling in OP_G.
* i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
CPU_MOVDIR64B_FLAGS.
(cpu_flags): Likewise.
(opcode_modifiers): Add AddrPrefixOpReg.
(i386_opcode_modifier): Likewise.
* i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
(i386_cpu_flags): Likewise.
* i386-opc.tbl: Add movidir{i,64b}.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index cd53fa46..b7fb991 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1029,6 +1029,10 @@ static const arch_entry cpu_arch[] = CPU_WAITPKG_FLAGS, 0 }, { STRING_COMMA_LEN (".cldemote"), PROCESSOR_UNKNOWN, CPU_CLDEMOTE_FLAGS, 0 }, + { STRING_COMMA_LEN (".movdiri"), PROCESSOR_UNKNOWN, + CPU_MOVDIRI_FLAGS, 0 }, + { STRING_COMMA_LEN (".movdir64b"), PROCESSOR_UNKNOWN, + CPU_MOVDIR64B_FLAGS, 0 }, }; static const noarch_entry cpu_noarch[] = @@ -1064,6 +1068,8 @@ static const noarch_entry cpu_noarch[] = { STRING_COMMA_LEN ("noavx512_bitalg"), CPU_ANY_AVX512_BITALG_FLAGS }, { STRING_COMMA_LEN ("noibt"), CPU_ANY_IBT_FLAGS }, { STRING_COMMA_LEN ("noshstk"), CPU_ANY_SHSTK_FLAGS }, + { STRING_COMMA_LEN ("nomovdiri"), CPU_ANY_MOVDIRI_FLAGS }, + { STRING_COMMA_LEN ("nomovdir64b"), CPU_ANY_MOVDIR64B_FLAGS }, }; #ifdef I386COFF @@ -6040,6 +6046,40 @@ process_suffix (void) break; } + if (i.tm.opcode_modifier.addrprefixopreg + && i.reg_operands != 0 + && i.operands > 1) + { + /* Check invalid register operand when the address size override + prefix changes the size of register operands. */ + unsigned int op; + enum { need_word, need_dword, need_qword } need; + + if (flag_code == CODE_32BIT) + need = i.prefix[ADDR_PREFIX] ? need_word : need_dword; + else + { + if (i.prefix[ADDR_PREFIX]) + need = need_dword; + else + need = flag_code == CODE_64BIT ? need_qword : need_word; + } + + for (op = 0; op < i.operands; op++) + if (i.types[op].bitfield.reg + && ((need == need_word + && !i.op[op].regs->reg_type.bitfield.word) + || (need == need_dword + && !i.op[op].regs->reg_type.bitfield.dword) + || (need == need_qword + && !i.op[op].regs->reg_type.bitfield.qword))) + { + as_bad (_("invalid register operand size for `%s'"), + i.tm.name); + return 0; + } + } + return 1; } |