x86: adjust {,E}VEX.W handling outside of 64-bit mode

Many VEX-/EVEX-encoded instructions accessing GPRs become WIG outside of
64-bit mode. The respective templates should specify neither VexWIG nor
VexW0, but instead the setting of the bit should be determined from
- REX.W in 64-bit mode,
- the setting established through -mvexwig= / -mevexwig= otherwise.
This implies that the evex-wig2 testcase needs to go away, as being
wrong altogether.

A few test additions desirable here will only happen in later patches,
as the disassembler needs adjustments first.

Once again SSE2AVX templates are left alone, for it being unclear what
the behavior there should be.

1 files changed, 2 insertions, 2 deletions

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 7d4ffc8..4fe9f0d 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3453,7 +3453,7 @@ build_vex_prefix (const insn_template *t)
   else if (i.tm.opcode_modifier.vexw)
     w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0;
   else
-    w = (i.rex & REX_W) ? 1 : 0;
+    w = (flag_code == CODE_64BIT ? i.rex & REX_W : vexwig == vexw1) ? 1 : 0;
 
   /* Use 2-byte VEX prefix if possible.  */
   if (w == 0
@@ -3646,7 +3646,7 @@ build_evex_prefix (void)
   else if (i.tm.opcode_modifier.vexw)
     w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0;
   else
-    w = (i.rex & REX_W) ? 1 : 0;
+    w = (flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1) ? 1 : 0;
 
   /* Encode the U bit.  */
   implied_prefix |= 0x4;