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| author | Nick Clifton <nickc@redhat.com> | 2011-05-11 09:25:44 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2011-05-11 09:25:44 +0000 |
| commit | 8d67f500e17ebf82c1ae0e29ff4629fec94c583c (patch) | |
| tree | 03b42cc64d4fab13d3bacd1025cb3bb59c1e3cf7 /gas/config | |
| parent | faf067f1a354df9682137d4910540c74ee7c929c (diff) | |
| download | gdb-8d67f500e17ebf82c1ae0e29ff4629fec94c583c.zip gdb-8d67f500e17ebf82c1ae0e29ff4629fec94c583c.tar.gz gdb-8d67f500e17ebf82c1ae0e29ff4629fec94c583c.tar.bz2 | |
* config/tc-arm.c(do_t_ldst): Warn on loading into sp with
writeback for appropriate cores/arch.
* testsuite/gas/arm/ld-sp-warn-cortex-m3.d: New test.
* testsuite/gas/arm/ld-sp-warn-cortex-m3.l: New test.
* testsuite/gas/arm/ld-sp-warn-cortex-m4.d: New test.
* testsuite/gas/arm/ld-sp-warn-cortex-m4.l: New test.
* testsuite/gas/arm/ld-sp-warn-v7.d: New test.
* testsuite/gas/arm/ld-sp-warn-v7.l: New test.
* testsuite/gas/arm/ld-sp-warn-v7a.d: New test.
* testsuite/gas/arm/ld-sp-warn-v7a.l: New test.
* testsuite/gas/arm/ld-sp-warn-v7e-m.l: New test.
* testsuite/gas/arm/ld-sp-warn-v7em.d: New test.
* testsuite/gas/arm/ld-sp-warn-v7m.d: New test.
* testsuite/gas/arm/ld-sp-warn-v7m.l: New test.
* testsuite/gas/arm/ld-sp-warn-v7r.d: New test.
* testsuite/gas/arm/ld-sp-warn-v7r.l: New test.
* testsuite/gas/arm/ld-sp-warn.s: New test.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-arm.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index af8c4aa..a0b31a0 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -239,6 +239,15 @@ static int mfloat_abi_opt = -1; static arm_feature_set selected_cpu = ARM_ARCH_NONE; /* Must be long enough to hold any of the names in arm_cpus. */ static char selected_cpu_name[16]; + +/* Return if no cpu was selected on command-line. */ +static bfd_boolean +no_cpu_selected (void) +{ + return selected_cpu.core == arm_arch_none.core + && selected_cpu.coproc == arm_arch_none.coproc; +} + #ifdef OBJ_ELF # ifdef EABI_DEFAULT static int meabi_flags = EABI_DEFAULT; @@ -10378,6 +10387,21 @@ do_t_ldst (void) } /* Definitely a 32-bit variant. */ + /* Warning for Erratum 752419. */ + if (opcode == T_MNEM_ldr + && inst.operands[0].reg == REG_SP + && inst.operands[1].writeback == 1 + && !inst.operands[1].immisreg) + { + if (no_cpu_selected () + || (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7) + && !ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7a) + && !ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7r))) + as_warn (_("This instruction may be unpredictable " + "if executed on M-profile cores " + "with interrupts enabled.")); + } + /* Do some validations regarding addressing modes. */ if (inst.operands[1].immisreg && opcode != T_MNEM_ldr && opcode != T_MNEM_str) |