diff options
| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 11:42:10 +0100 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 12:30:33 +0100 |
| commit | 65d1bc05e89e45b102783422c3984ed718547d5c (patch) | |
| tree | 48d1281e4669ab86e97989fbd45a09f86be134aa /gas/config | |
| parent | 1caf72a5849abf9a717ed3e0232abf591ff933e7 (diff) | |
| download | gdb-65d1bc05e89e45b102783422c3984ed718547d5c.zip gdb-65d1bc05e89e45b102783422c3984ed718547d5c.tar.gz gdb-65d1bc05e89e45b102783422c3984ed718547d5c.tar.bz2 | |
[binutils, ARM, 9/16] New BFL instruction for Armv8.1-M Mainline
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This patch adds the BFL instruction.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entrie for bfl.
(do_t_v8_1_branch): New switch case for bfl.
(insns): New instruction for bfl.
* testsuite/gas/arm/armv8_1-m-bfl.d: New.
* testsuite/gas/arm/armv8_1-m-bfl.s: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.s: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.d: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.l: New.
* testsuite/gas/arm/armv8_1-m-bfl-rel.d: New.
* testsuite/gas/arm/armv8_1-m-bfl-rel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bfl.s: New.
* testsuite/ld-arm/bfl.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instruction bfl.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-arm.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 177d90f..5643e3f 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -10507,6 +10507,7 @@ encode_thumb32_addr_mode (int i, bfd_boolean is_t, bfd_boolean is_d) X(_bcond, d000, f0008000), \ X(_bf, 0000, f040e001), \ X(_bfx, 0000, f060e001), \ + X(_bfl, 0000, f000c001), \ X(_bflx, 0000, f070e001), \ X(_bic, 4380, ea200000), \ X(_bics, 4380, ea300000), \ @@ -13364,6 +13365,25 @@ do_t_branch_future (void) } break; + case T_MNEM_bfl: + if (inst.operands[1].hasreloc == 0) + { + int val = inst.operands[1].imm; + if (v8_1_branch_value_check (inst.operands[1].imm, 19, TRUE) == FAIL) + as_bad (BAD_BRANCH_OFF); + + int immA = (val & 0x0007f000) >> 12; + int immB = (val & 0x00000ffc) >> 2; + int immC = (val & 0x00000002) >> 1; + inst.instruction |= (immA << 16) | (immB << 1) | (immC << 11); + } + else + { + inst.relocs[1].type = BFD_RELOC_ARM_THUMB_BF19; + inst.relocs[1].pc_rel = 1; + } + break; + case T_MNEM_bfx: case T_MNEM_bflx: inst.instruction |= inst.operands[1].reg << 16; @@ -21687,6 +21707,7 @@ static const struct asm_opcode insns[] = #define THUMB_VARIANT & arm_ext_v8_1m_main toC("bf", _bf, 2, (EXPs, EXPs), t_branch_future), toC("bfx", _bfx, 2, (EXPs, RRnpcsp), t_branch_future), + toC("bfl", _bfl, 2, (EXPs, EXPs), t_branch_future), toC("bflx", _bflx, 2, (EXPs, RRnpcsp), t_branch_future), }; #undef ARM_VARIANT |