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| author | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-10-24 10:08:15 +0000 |
|---|---|---|
| committer | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-11-19 02:57:05 +0000 |
| commit | 15253318be0995200cc59929ca32eedbfd041e45 (patch) | |
| tree | c17c4334f5d2922430e190eced4626ccca97d40a /gas/config | |
| parent | 84bcca538dd74e82bfb7cfde37003d384b3f5daa (diff) | |
| download | gdb-15253318be0995200cc59929ca32eedbfd041e45.zip gdb-15253318be0995200cc59929ca32eedbfd041e45.tar.gz gdb-15253318be0995200cc59929ca32eedbfd041e45.tar.bz2 | |
RISC-V: Add 'Ssstateen' extension and its CSRs
This commit adds 'Ssstateen' extension, which is a supervisor-visible view
of the 'Smstateen' extension. It means, this extension implements sstateen*
and hstateen* CSRs of the 'Smstateen' extension.
Note that 'Smstateen' extension itself is unchanged but due to
implementation simplicity, it is implemented so that 'Smstateen' implies
'Ssstateen' (just like 'M' implies 'Zmmul').
This is based on the latest version of RISC-V Profiles
(version 0.9-draft, Frozen):
<https://github.com/riscv/riscv-profiles/commit/226b7f643067b29abc6723fac60d5f6d3f9eb901>
bfd/ChangeLog:
* elfxx-riscv.c (riscv_implicit_subsets): Update implication rules.
(riscv_supported_std_s_ext) Add 'Ssstateen' extension.
gas/ChangeLog:
* config/tc-riscv.c (enum riscv_csr_class): Rename
CSR_CLASS_SMSTATEEN_AND_H{,_32} to CSR_CLASS_SSSTATEEN_...
Add CSR_CLASS_SSSTATEEN.
(riscv_csr_address): Support new/renamed CSR classes.
* testsuite/gas/riscv/csr.s: Add 'Ssstateen' extension to comment.
* testsuite/gas/riscv/csr-version-1p9p1.l: Reflect changes to
error messages.
* testsuite/gas/riscv/csr-version-1p10.l: Likewise.
* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
* testsuite/gas/riscv/csr-version-1p12.l: Likewise.
* testsuite/gas/riscv/ssstateen-csr.s: Test for 'Ssstateen' CSRs.
* testsuite/gas/riscv/ssstateen-csr.d: Likewise.
* testsuite/gas/riscv/smstateen-csr-s.d: Test to make sure that
supervisor/hypervisor part of 'Smstateen' CSRs are accessible from
'RV32IH_Smstateen', not just from 'RV32IH_Ssstateen' that is tested
in ssstateen-csr.d.
include/ChangeLog:
* opcode/riscv-opc.h: Update DECLARE_CSR declarations with
new CSR classes.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-riscv.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 2dc92ec..0195451 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -69,9 +69,10 @@ enum riscv_csr_class CSR_CLASS_H, /* hypervisor */ CSR_CLASS_H_32, /* hypervisor, rv32 only */ CSR_CLASS_SMSTATEEN, /* Smstateen only */ - CSR_CLASS_SMSTATEEN_AND_H, /* Smstateen only (with H) */ CSR_CLASS_SMSTATEEN_32, /* Smstateen RV32 only */ - CSR_CLASS_SMSTATEEN_AND_H_32, /* Smstateen RV32 only (with H) */ + CSR_CLASS_SSSTATEEN, /* S[ms]stateen only */ + CSR_CLASS_SSSTATEEN_AND_H, /* S[ms]stateen only (with H) */ + CSR_CLASS_SSSTATEEN_AND_H_32, /* S[ms]stateen RV32 only (with H) */ CSR_CLASS_SSCOFPMF, /* Sscofpmf only */ CSR_CLASS_SSCOFPMF_32, /* Sscofpmf RV32 only */ CSR_CLASS_SSTC, /* Sstc only */ @@ -1029,15 +1030,18 @@ riscv_csr_address (const char *csr_name, extension = "zve32x"; break; case CSR_CLASS_SMSTATEEN: - case CSR_CLASS_SMSTATEEN_AND_H: case CSR_CLASS_SMSTATEEN_32: - case CSR_CLASS_SMSTATEEN_AND_H_32: - is_rv32_only = (csr_class == CSR_CLASS_SMSTATEEN_32 - || csr_class == CSR_CLASS_SMSTATEEN_AND_H_32); - is_h_required = (csr_class == CSR_CLASS_SMSTATEEN_AND_H - || csr_class == CSR_CLASS_SMSTATEEN_AND_H_32); + is_rv32_only = (csr_class == CSR_CLASS_SMSTATEEN_32); extension = "smstateen"; break; + case CSR_CLASS_SSSTATEEN: + case CSR_CLASS_SSSTATEEN_AND_H: + case CSR_CLASS_SSSTATEEN_AND_H_32: + is_rv32_only = (csr_class == CSR_CLASS_SSSTATEEN_AND_H_32); + is_h_required = (csr_class == CSR_CLASS_SSSTATEEN_AND_H + || csr_class == CSR_CLASS_SSSTATEEN_AND_H_32); + extension = "ssstateen"; + break; case CSR_CLASS_SSCOFPMF_32: is_rv32_only = true; /* Fall through. */ |