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authorMaciej W. Rozycki <macro@imgtec.com>2016-01-18 21:29:37 +0000
committerMaciej W. Rozycki <macro@imgtec.com>2016-01-18 22:19:54 +0000
commit100b4f2e9f65565e3e3e484162c4474effc54be8 (patch)
tree373155614842784f25b2f1a5383a7c88f852a476 /gas/config
parent3d304f48cafbff4b7a1c0a9d338fb20aa4e4934b (diff)
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MIPS: Remove remnants of 48-bit microMIPS instruction support
The POOL48A major opcode was defined in early revisions of the 64-bit microMIPS ISA, has never been implemented, and was removed before the 64-bit microMIPS ISA specification[1] has been finalized. This complements commit a6c7053929dd ("MIPS/opcodes: Remove microMIPS 48-bit LI instruction"). References: [1] "MIPS Architecture for Programmers, Volume II-B: The microMIPS64 Instruction Set", MIPS Technologies, Inc., Document Number: MD00594, Revision 3.06, October 17, 2012, Table 6.2 "microMIPS64 Encoding of Major Opcode Field", p. 578 gas/ * config/tc-mips.c (micromips_insn_length): Remove the mention of 48-bit microMIPS instructions. gdb/ * mips-tdep.c (mips_insn_size): Remove 48-bit microMIPS instruction support. (micromips_next_pc): Likewise. (micromips_scan_prologue): Likewise. (micromips_deal_with_atomic_sequence): Likewise. (micromips_stack_frame_destroyed_p): Likewise. (mips_breakpoint_from_pc): Likewise. opcodes/ * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS instruction support.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-mips.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 859ddc6..d577774 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -2089,10 +2089,8 @@ mips_lookup_ase (const char *name)
}
/* Return the length of a microMIPS instruction in bytes. If bits of
- the mask beyond the low 16 are 0, then it is a 16-bit instruction.
- Otherwise assume a 32-bit instruction; 48-bit instructions (0x1f
- major opcode) will require further modifications to the opcode
- table. */
+ the mask beyond the low 16 are 0, then it is a 16-bit instruction,
+ otherwise it is a 32-bit instruction. */
static inline unsigned int
micromips_insn_length (const struct mips_opcode *mo)