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author | Jiong Wang <jiong.wang@arm.com> | 2015-03-13 12:02:23 +0000 |
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committer | Jiong Wang <jiong.wang@arm.com> | 2015-03-13 12:02:23 +0000 |
commit | 4bf8c6e8986890caa482c845d2c4a0ff238c1e28 (patch) | |
tree | 45991251aa81b859daf06536d9bbb724dfdd0e00 /gas/config | |
parent | bc9706f8235a917f0b534f3790e2ac9981d53e94 (diff) | |
download | gdb-4bf8c6e8986890caa482c845d2c4a0ff238c1e28.zip gdb-4bf8c6e8986890caa482c845d2c4a0ff238c1e28.tar.gz gdb-4bf8c6e8986890caa482c845d2c4a0ff238c1e28.tar.bz2 |
[AArch64] Don't warn on XZR/SP overlapping when it's in load/store
2015-03-13 Jiong Wang <jiong.wang@arm.com>
gas/
* config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31.
gas/testsuite/
* gas/aarch64/diagnostic.s: New testcases.
* gas/aarch64/diagnostic.l: New error match.
Diffstat (limited to 'gas/config')
-rw-r--r-- | gas/config/tc-aarch64.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 77701c6..5031134 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -5585,6 +5585,7 @@ warn_unpredictable_ldst (aarch64_instruction *instr, char *str) if ((aarch64_get_operand_class (opnds[0].type) == AARCH64_OPND_CLASS_INT_REG) && opnds[0].reg.regno == opnds[1].addr.base_regno + && opnds[1].addr.base_regno != REG_SP && opnds[1].addr.writeback) as_warn (_("unpredictable transfer with writeback -- `%s'"), str); break; @@ -5596,6 +5597,7 @@ warn_unpredictable_ldst (aarch64_instruction *instr, char *str) == AARCH64_OPND_CLASS_INT_REG) && (opnds[0].reg.regno == opnds[2].addr.base_regno || opnds[1].reg.regno == opnds[2].addr.base_regno) + && opnds[2].addr.base_regno != REG_SP && opnds[2].addr.writeback) as_warn (_("unpredictable transfer with writeback -- `%s'"), str); /* Load operations must load different registers. */ |