From 4bf8c6e8986890caa482c845d2c4a0ff238c1e28 Mon Sep 17 00:00:00 2001 From: Jiong Wang Date: Fri, 13 Mar 2015 12:02:23 +0000 Subject: [AArch64] Don't warn on XZR/SP overlapping when it's in load/store 2015-03-13 Jiong Wang gas/ * config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31. gas/testsuite/ * gas/aarch64/diagnostic.s: New testcases. * gas/aarch64/diagnostic.l: New error match. --- gas/config/tc-aarch64.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'gas/config') diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 77701c6..5031134 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -5585,6 +5585,7 @@ warn_unpredictable_ldst (aarch64_instruction *instr, char *str) if ((aarch64_get_operand_class (opnds[0].type) == AARCH64_OPND_CLASS_INT_REG) && opnds[0].reg.regno == opnds[1].addr.base_regno + && opnds[1].addr.base_regno != REG_SP && opnds[1].addr.writeback) as_warn (_("unpredictable transfer with writeback -- `%s'"), str); break; @@ -5596,6 +5597,7 @@ warn_unpredictable_ldst (aarch64_instruction *instr, char *str) == AARCH64_OPND_CLASS_INT_REG) && (opnds[0].reg.regno == opnds[2].addr.base_regno || opnds[1].reg.regno == opnds[2].addr.base_regno) + && opnds[2].addr.base_regno != REG_SP && opnds[2].addr.writeback) as_warn (_("unpredictable transfer with writeback -- `%s'"), str); /* Load operations must load different registers. */ -- cgit v1.1