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| author | Alan Hayward <alan.hayward@arm.com> | 2019-05-14 10:09:05 +0100 |
|---|---|---|
| committer | Alan Hayward <alan.hayward@arm.com> | 2019-05-14 10:10:56 +0100 |
| commit | a6d0f2490c0c7969eb60038f01c0ee0f46e4d5fd (patch) | |
| tree | 691f94788a913e65c545a9cedff6dc2082c2ec10 /gas/config/tc-tilegx.c | |
| parent | 2764128dee821448ba43a50ed8cee387f2ee8dca (diff) | |
| download | gdb-a6d0f2490c0c7969eb60038f01c0ee0f46e4d5fd.zip gdb-a6d0f2490c0c7969eb60038f01c0ee0f46e4d5fd.tar.gz gdb-a6d0f2490c0c7969eb60038f01c0ee0f46e4d5fd.tar.bz2 | |
AArch64: Add half float view to V registers
AArch64 can fill the vector registers with half precision floats.
Add a view for this.
Add builtin type ieee half and connect this to the existing
floatformats_ieee_half.
gdb/ChangeLog:
2019-05-14 Alan Hayward <alan.hayward@arm.com>
* aarch64-tdep.c (aarch64_vnh_type): Add half view.
(aarch64_vnv_type): Likewise.
* target-descriptions.c (make_gdb_type): Add TDESC_TYPE_IEEE_HALF.
* common/tdesc.c: Likewise.
* common/tdesc.h (enum tdesc_type_kind): Likewise.
* features/aarch64-fpu.c (create_feature_aarch64_fpu): Regenerate.
* features/aarch64-fpu.xml: Add ieee half view.
* features/aarch64-sve.c (create_feature_aarch64_fpu): Likewise.
* gdbtypes.c (gdbtypes_post_init): Add builtin_half
* gdbtypes.h (struct builtin_type): Likewise.
(struct objfile_type): Likewise.
Diffstat (limited to 'gas/config/tc-tilegx.c')
0 files changed, 0 insertions, 0 deletions