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| author | Jan Beulich <jbeulich@suse.com> | 2023-11-03 10:01:19 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2023-11-03 10:01:19 +0100 |
| commit | e4bec45d36650d94eaba5c88ddda9e5ad242662d (patch) | |
| tree | b5877388368cac43097de9af583cc375a6940b31 /gas/config/tc-riscv.c | |
| parent | 268109cad16c692e24a583c21ef5a8ac58cc51fe (diff) | |
| download | gdb-e4bec45d36650d94eaba5c88ddda9e5ad242662d.zip gdb-e4bec45d36650d94eaba5c88ddda9e5ad242662d.tar.gz gdb-e4bec45d36650d94eaba5c88ddda9e5ad242662d.tar.bz2 | |
RISC-V: make FLQ/FSQ macro-insns work
When support for the Q extension was added, the libopcodes side of these
macro-insns was properly covered, but no backing support in gas was
added. In new testcases cover not just these, but all Q-extension insns.
Diffstat (limited to 'gas/config/tc-riscv.c')
| -rw-r--r-- | gas/config/tc-riscv.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 09f2ea1..aa952a6 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -2101,6 +2101,11 @@ macro (struct riscv_cl_insn *ip, expressionS *imm_expr, BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_I); break; + case M_FLQ: + pcrel_load (rd, rs1, imm_expr, "flq", + BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_I); + break; + case M_SB: pcrel_store (rs2, rs1, imm_expr, "sb", BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_S); @@ -2131,6 +2136,11 @@ macro (struct riscv_cl_insn *ip, expressionS *imm_expr, BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_S); break; + case M_FSQ: + pcrel_store (rs2, rs1, imm_expr, "fsq", + BFD_RELOC_RISCV_PCREL_HI20, BFD_RELOC_RISCV_PCREL_LO12_S); + break; + case M_CALL: riscv_call (rd, rs1, imm_expr, *imm_reloc); break; |