RISC-V: Supports Zcb extension.

This patch support Zcb extension, contains new compressed instructions,
some instructions depend on other existed extension, like 'zba', 'zbb'
and 'zmmul'.  Zcb also imply Zca extension to enable the compressing
features.

Co-Authored by: Charlie Keaney <charlie.keaney@embecosm.com>
Co-Authored by: Mary Bennett <mary.bennett@embecosm.com>
Co-Authored by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>
Co-Authored by: Sinan Lin <sinan.lin@linux.alibaba.com>
Co-Authored by: Simon Cook <simon.cook@embecosm.com>
Co-Authored by: Shihua Liao <shihua@iscas.ac.cn>
Co-Authored by: Yulong Shi <yulong@iscas.ac.cn>

bfd/ChangeLog:

        * elfxx-riscv.c (riscv_multi_subset_supports): New extension.
        (riscv_multi_subset_supports_ext): Ditto.

gas/ChangeLog:

        * config/tc-riscv.c (validate_riscv_insn): New operators.
        (riscv_ip): Ditto.
        * testsuite/gas/riscv/zcb.d: New test.
        * testsuite/gas/riscv/zcb.s: New test.

include/ChangeLog:

        * opcode/riscv-opc.h (MATCH_C_LBU): New opcode.
        (MASK_C_LBU): New mask.
        (MATCH_C_LHU): New opcode.
        (MASK_C_LHU): New mask.
        (MATCH_C_LH): New opcode.
        (MASK_C_LH): New mask.
        (MATCH_C_SB): New opcode.
        (MASK_C_SB): New mask.
        (MATCH_C_SH): New opcode.
        (MASK_C_SH): New mask.
        (MATCH_C_ZEXT_B): New opcode.
        (MASK_C_ZEXT_B): New mask.
        (MATCH_C_SEXT_B): New opcode.
        (MASK_C_SEXT_B): New mask.
        (MATCH_C_ZEXT_H): New opcode.
        (MASK_C_ZEXT_H): New mask.
        (MATCH_C_SEXT_H): New opcode.
        (MASK_C_SEXT_H): New mask.
        (MATCH_C_ZEXT_W): New opcode.
        (MASK_C_ZEXT_W): New mask.
        (MATCH_C_NOT): New opcode.
        (MASK_C_NOT): New mask.
        (MATCH_C_MUL): New opcode.
        (MASK_C_MUL): New mask.
        (DECLARE_INSN): New opcode.
        * opcode/riscv.h (EXTRACT_ZCB_BYTE_UIMM): New inline func.
        (EXTRACT_ZCB_HALFWORD_UIMM): Ditto.
        (ENCODE_ZCB_BYTE_UIMM): Ditto.
        (ENCODE_ZCB_HALFWORD_UIMM): Ditto.
        (VALID_ZCB_BYTE_UIMM): Ditto.
        (VALID_ZCB_HALFWORD_UIMM): Ditto.
        (enum riscv_insn_class): New extension class.

opcodes/ChangeLog:

        * riscv-dis.c (print_insn_args): New operators.
        * riscv-opc.c: New instructions.

1 files changed, 53 insertions, 0 deletions

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 8c23c6a..80c14a3 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -1426,6 +1426,18 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length)
 		  goto unknown_validate_operand;
 		}
 	      break;
+	    case 'c':
+	      switch (*++oparg)
+		{
+		/* byte immediate operators, load/store byte insns.  */
+		case 'h': used_bits |= ENCODE_ZCB_HALFWORD_UIMM (-1U); break;
+		/* halfword immediate operators, load/store halfword insns.  */
+		case 'b': used_bits |= ENCODE_ZCB_BYTE_UIMM (-1U); break;
+		case 'f': break;
+		default:
+		  goto unknown_validate_operand;
+		}
+	      break;
 	    default:
 	      goto unknown_validate_operand;
 	    }
@@ -3559,6 +3571,47 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr,
 		      goto unknown_riscv_ip_operand;
 		    }
 		  break;
+
+		case 'c':
+		  switch (*++oparg)
+		    {
+		    case 'h': /* Immediate field for c.lh/c.lhu/c.sh.  */
+		      /* Handle cases, such as c.sh rs2', (rs1').  */
+		      if (riscv_handle_implicit_zero_offset (imm_expr, asarg))
+			continue;
+		      if (my_getSmallExpression (imm_expr, imm_reloc, asarg, p)
+			  || imm_expr->X_op != O_constant
+			  || !VALID_ZCB_HALFWORD_UIMM ((valueT) imm_expr->X_add_number))
+			break;
+		      ip->insn_opcode |= ENCODE_ZCB_HALFWORD_UIMM (imm_expr->X_add_number);
+		      goto rvc_imm_done;
+
+		    case 'b': /* Immediate field for c.lbu/c.sb.  */
+		      /* Handle cases, such as c.lbu rd', (rs1').  */
+		      if (riscv_handle_implicit_zero_offset (imm_expr, asarg))
+			continue;
+		      if (my_getSmallExpression (imm_expr, imm_reloc, asarg, p)
+			  || imm_expr->X_op != O_constant
+			  || !VALID_ZCB_BYTE_UIMM ((valueT) imm_expr->X_add_number))
+			break;
+		      ip->insn_opcode |= ENCODE_ZCB_BYTE_UIMM (imm_expr->X_add_number);
+		      goto rvc_imm_done;
+
+		    case 'f': /* Operand for matching immediate 255.  */
+		      if (my_getSmallExpression (imm_expr, imm_reloc, asarg, p)
+			  || imm_expr->X_op != O_constant
+			  || imm_expr->X_add_number != 255)
+			break;
+		      /* This operand is used for matching immediate 255, and
+			 we do not write anything to encoding by this operand.  */
+		      asarg = expr_parse_end;
+		      imm_expr->X_op = O_absent;
+		      continue;
+
+		    default:
+		      goto unknown_riscv_ip_operand;
+		    }
+		  break;
 		default:
 		  goto unknown_riscv_ip_operand;
 		}