riscv: Add AIA extension support (Smaia, Ssaia)

This commit adds the AIA extensions (Smaia and Ssaia) CSRs.

bfd/ChangeLog:

	* elfxx-riscv.c: Add 'smaia' and 'ssaia' to the list
	of known standard extensions.

gas/ChangeLog:

	* config/tc-riscv.c (enum riscv_csr_class):
	(riscv_csr_address): Add CSR classes for Smaia/Ssaia.
	* testsuite/gas/riscv/csr-dw-regnums.d: Add new CSRs.
	* testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.l: Likewise.
	* testsuite/gas/riscv/csr.s: Likewise.

include/ChangeLog:

	* opcode/riscv-opc.h (CSR_MISELECT): New CSR macro.
	(CSR_MIREG): Likewise.
	(CSR_MTOPEI): Likewise.
	(CSR_MTOPI): Likewise.
	(CSR_MVIEN): Likewise.
	(CSR_MVIP): Likewise.
	(CSR_MIDELEGH): Likewise.
	(CSR_MIEH): Likewise.
	(CSR_MVIENH): Likewise.
	(CSR_MVIPH): Likewise.
	(CSR_MIPH): Likewise.
	(CSR_SISELECT): Likewise.
	(CSR_SIREG): Likewise.
	(CSR_STOPEI): Likewise.
	(CSR_STOPI): Likewise.
	(CSR_SIEH): Likewise.
	(CSR_SIPH): Likewise.
	(CSR_HVIEN): Likewise.
	(CSR_HVICTL): Likewise.
	(CSR_HVIPRIO1): Likewise.
	(CSR_HVIPRIO2): Likewise.
	(CSR_VSISELECT): Likewise.
	(CSR_VSIREG): Likewise.
	(CSR_VSTOPEI): Likewise.
	(CSR_VSTOPI): Likewise.
	(CSR_HIDELEGH): Likewise.
	(CSR_HVIENH): Likewise.
	(CSR_HVIPH): Likewise.
	(CSR_HVIPRIO1H): Likewise.
	(CSR_HVIPRIO2H): Likewise.
	(CSR_VSIEH): Likewise.
	(CSR_VSIPH): Likewise.
	(DECLARE_CSR): Add CSRs for Smaia and Ssaia.

Changes for v3:
- Imply ssaia for smaia
- Imply zicsr for ssaia (and transitively smaia)
- Move hypervisor CSRs to Ssaia+H
- Rebase on upstream/master

Changes for v2:
- Add hypervisor and VS CSRs
- Fix whitespace issue

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

1 files changed, 22 insertions, 0 deletions

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 0195451..96d71dd 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -68,8 +68,14 @@ enum riscv_csr_class
   CSR_CLASS_DEBUG,	/* debug CSR */
   CSR_CLASS_H,		/* hypervisor */
   CSR_CLASS_H_32,	/* hypervisor, rv32 only */
+  CSR_CLASS_SMAIA,		/* Smaia */
+  CSR_CLASS_SMAIA_32,		/* Smaia, rv32 only */
   CSR_CLASS_SMSTATEEN,		/* Smstateen only */
   CSR_CLASS_SMSTATEEN_32,	/* Smstateen RV32 only */
+  CSR_CLASS_SSAIA,		/* Ssaia */
+  CSR_CLASS_SSAIA_AND_H,	/* Ssaia with H */
+  CSR_CLASS_SSAIA_32,		/* Ssaia, rv32 only */
+  CSR_CLASS_SSAIA_AND_H_32,	/* Ssaia with H, rv32 only */
   CSR_CLASS_SSSTATEEN,		/* S[ms]stateen only */
   CSR_CLASS_SSSTATEEN_AND_H,	/* S[ms]stateen only (with H) */
   CSR_CLASS_SSSTATEEN_AND_H_32,	/* S[ms]stateen RV32 only (with H) */
@@ -1029,11 +1035,27 @@ riscv_csr_address (const char *csr_name,
     case CSR_CLASS_V:
       extension = "zve32x";
       break;
+    case CSR_CLASS_SMAIA_32:
+      is_rv32_only = true;
+      /* Fall through.  */
+    case CSR_CLASS_SMAIA:
+      extension = "smaia";
+      break;
     case CSR_CLASS_SMSTATEEN:
     case CSR_CLASS_SMSTATEEN_32:
       is_rv32_only = (csr_class == CSR_CLASS_SMSTATEEN_32);
       extension = "smstateen";
       break;
+    case CSR_CLASS_SSAIA:
+    case CSR_CLASS_SSAIA_AND_H:
+    case CSR_CLASS_SSAIA_32:
+    case CSR_CLASS_SSAIA_AND_H_32:
+      is_rv32_only = (csr_class == CSR_CLASS_SSAIA_32
+		      || csr_class == CSR_CLASS_SSAIA_AND_H_32);
+      is_h_required = (csr_class == CSR_CLASS_SSAIA_AND_H
+		       || csr_class == CSR_CLASS_SSAIA_AND_H_32);
+      extension = "ssaia";
+      break;
     case CSR_CLASS_SSSTATEEN:
     case CSR_CLASS_SSSTATEEN_AND_H:
     case CSR_CLASS_SSSTATEEN_AND_H_32: