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author | Jim Wilson <jimw@sifive.com> | 2019-09-17 17:59:08 -0700 |
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committer | Jim Wilson <jimw@sifive.com> | 2019-09-17 17:59:08 -0700 |
commit | 7e9ad3a35cde2342e07c34345d5ee671ea8aeeb4 (patch) | |
tree | 5e7c5bf918a812bd4b385addf9fe10b616e10f9c /gas/config/tc-riscv.c | |
parent | 491144b5e21bbfd41969c175aebb663976f59058 (diff) | |
download | gdb-7e9ad3a35cde2342e07c34345d5ee671ea8aeeb4.zip gdb-7e9ad3a35cde2342e07c34345d5ee671ea8aeeb4.tar.gz gdb-7e9ad3a35cde2342e07c34345d5ee671ea8aeeb4.tar.bz2 |
RISC-V: Gate opcode tables by enum rather than string.
Generalize opcode arch dependencies so that we can support the
overlapping B extension Zb* subsets.
2019-09-17 Maxim Blinov <maxim.blinov@embecosm.com>
gas/
* config/tc-riscv.c (riscv_multi_subset_supports): Handle
insn_class enum rather than subset char string.
(riscv_ip): Update call to riscv_multi_subset_supports.
include/
* opcode/riscv.h (riscv_insn_class): New enum.
* opcode/riscv.h (struct riscv_opcode): Change
subset field to insn_class field.
opcodes/
* riscv-opc.c (riscv_opcodes): Change subset field
to insn_class field for all instructions.
(riscv_insn_types): Likewise.
Diffstat (limited to 'gas/config/tc-riscv.c')
-rw-r--r-- | gas/config/tc-riscv.c | 27 |
1 files changed, 20 insertions, 7 deletions
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 12047d7..e505051 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -121,15 +121,28 @@ riscv_subset_supports (const char *feature) } static bfd_boolean -riscv_multi_subset_supports (const char *features[]) +riscv_multi_subset_supports (enum riscv_insn_class insn_class) { - unsigned i = 0; - bfd_boolean supported = TRUE; + switch (insn_class) + { + case INSN_CLASS_I: return riscv_subset_supports ("i"); + case INSN_CLASS_C: return riscv_subset_supports ("c"); + case INSN_CLASS_A: return riscv_subset_supports ("a"); + case INSN_CLASS_M: return riscv_subset_supports ("m"); + case INSN_CLASS_F: return riscv_subset_supports ("f"); + case INSN_CLASS_D: return riscv_subset_supports ("d"); + case INSN_CLASS_D_AND_C: + return riscv_subset_supports ("d") && riscv_subset_supports ("c"); + + case INSN_CLASS_F_AND_C: + return riscv_subset_supports ("f") && riscv_subset_supports ("c"); - for (;features[i]; ++i) - supported = supported && riscv_subset_supports (features[i]); + case INSN_CLASS_Q: return riscv_subset_supports ("q"); - return supported; + default: + as_fatal ("Unreachable"); + return FALSE; + } } /* Set which ISA and extensions are available. */ @@ -1427,7 +1440,7 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr, if ((insn->xlen_requirement != 0) && (xlen != insn->xlen_requirement)) continue; - if (!riscv_multi_subset_supports (insn->subset)) + if (!riscv_multi_subset_supports (insn->insn_class)) continue; create_insn (ip, insn); |