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| author | Alan Modra <amodra@gmail.com> | 2019-05-06 08:43:32 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2019-05-06 11:41:28 +0930 |
| commit | 334d91b9407c5f9f37f224b0f43551c01964eff1 (patch) | |
| tree | cbd9f9290f354419eaef60efd05261073ce323b3 /gas/config/tc-ppc.c | |
| parent | 62e6b7b3b3c6f2fffe9f5863ddebf430533b79f0 (diff) | |
| download | gdb-334d91b9407c5f9f37f224b0f43551c01964eff1.zip gdb-334d91b9407c5f9f37f224b0f43551c01964eff1.tar.gz gdb-334d91b9407c5f9f37f224b0f43551c01964eff1.tar.bz2 | |
PowerPC reloc symbols that shouldn't be adjusted
GOT and PLT relocs shouldn't have their symbols replaced with a
section symbol plus added. Nor should the HIGHA TLS relocations,
which failed to be caught by the range test in ppc_fix_adjustable.
bfd/
* reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA),
(BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA):
Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry.
gas/
* config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT
relocs, and VLE sdarel relocs.
* testsuite/gas/ppc/power4.d: Adjust.
Diffstat (limited to 'gas/config/tc-ppc.c')
| -rw-r--r-- | gas/config/tc-ppc.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index c71fe94..d5d51f7 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -6765,7 +6765,27 @@ ppc_fix_adjustable (fixS *fix) && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS + && fix->fx_r_type != BFD_RELOC_16_GOT_PCREL + && fix->fx_r_type != BFD_RELOC_32_GOTOFF + && fix->fx_r_type != BFD_RELOC_24_PLT_PCREL + && fix->fx_r_type != BFD_RELOC_32_PLTOFF + && fix->fx_r_type != BFD_RELOC_32_PLT_PCREL + && fix->fx_r_type != BFD_RELOC_LO16_PLTOFF + && fix->fx_r_type != BFD_RELOC_HI16_PLTOFF + && fix->fx_r_type != BFD_RELOC_HI16_S_PLTOFF + && fix->fx_r_type != BFD_RELOC_64_PLTOFF + && fix->fx_r_type != BFD_RELOC_64_PLT_PCREL + && fix->fx_r_type != BFD_RELOC_PPC64_PLT16_LO_DS + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16 + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HI + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HA + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_DS + && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO_DS && fix->fx_r_type != BFD_RELOC_GPREL16 + && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_LO16A + && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HI16A + && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HA16A && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS |