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| author | Andrew Bennett <andrew.bennett@imgtec.com> | 2014-04-08 14:50:42 +0100 |
|---|---|---|
| committer | Andrew Bennett <andrew.bennett@imgtec.com> | 2014-04-10 10:20:50 +0100 |
| commit | bbaa46c0f3f297bf776d9a171a7442e8a6f7a024 (patch) | |
| tree | 7e8b98ee74ae5ce4fc65953f7653e23984272e30 /gas/config/tc-mips.c | |
| parent | 7af20180c0c537c78aabf4cfa0e9ab2880a52877 (diff) | |
| download | gdb-bbaa46c0f3f297bf776d9a171a7442e8a6f7a024.zip gdb-bbaa46c0f3f297bf776d9a171a7442e8a6f7a024.tar.gz gdb-bbaa46c0f3f297bf776d9a171a7442e8a6f7a024.tar.bz2 | |
Add support for the MIPS P5600 family of CPUs.
ChangeLog:
2014-04-10 Andrew Bennett <andrew.bennett@imgtec.com>
* config/tc-mips.c (mips_cpu_info_table): Add P5600
configuation.
* doc/c-mips.texi: Document p5600.
Diffstat (limited to 'gas/config/tc-mips.c')
| -rw-r--r-- | gas/config/tc-mips.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 318b0b5..47de8d3 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -17902,6 +17902,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "1004kf2_1", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, { "1004kf", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, { "1004kf1_1", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, + /* P5600 with EVA and Virtualization ASEs, other ASEs are optional. */ + { "p5600", 0, ASE_VIRT | ASE_EVA, ISA_MIPS32R2, CPU_MIPS32R2 }, /* MIPS 64 */ { "5kc", 0, 0, ISA_MIPS64, CPU_MIPS64 }, |