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author | Jan Beulich <jbeulich@suse.com> | 2020-06-16 10:34:55 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2020-06-16 10:34:55 +0200 |
commit | 2106ed9baf1098a5d76469ecde30813065c46c68 (patch) | |
tree | ec8c017bc51e49ab5880cf91810399c71921840a /gas/config/tc-i386.c | |
parent | a435742a7fb32f6320ce0e6074e2500e28378104 (diff) | |
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x86: drop SSE4a from SSE check again
Upon re-consideration in commit 569d50f1c611 ("x86: further refine SSE
check (SSE4a, SHA, GFNI)") I went too far: Mixing of SSE and AVX insns
doesn't suffer as bad a penalty on AMD CPUs as on Intel ones. SSE4a
being an AMD-only extension, it shouldn't be part of the ISA extensions
set for which the diagnostic may get issued. Undo that part.
Diffstat (limited to 'gas/config/tc-i386.c')
-rw-r--r-- | gas/config/tc-i386.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index a5b9061..b5d7e1c 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4753,7 +4753,6 @@ md_assemble (char *line) || i.tm.cpu_flags.bitfield.cpussse3 || i.tm.cpu_flags.bitfield.cpusse4_1 || i.tm.cpu_flags.bitfield.cpusse4_2 - || i.tm.cpu_flags.bitfield.cpusse4a || i.tm.cpu_flags.bitfield.cpupclmul || i.tm.cpu_flags.bitfield.cpuaes || i.tm.cpu_flags.bitfield.cpusha |