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authorJan Beulich <jbeulich@suse.com>2022-05-27 08:48:58 +0200
committerJan Beulich <jbeulich@suse.com>2022-05-27 08:48:58 +0200
commit7063667edb6a663163c2adba754b5abbbe67dc46 (patch)
tree915694f647592bf8fe74d4b68b781efaf88f30dd /gas/config/tc-i386-intel.c
parentcf665fee1d6c9efa2e59af496cd132393732306d (diff)
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x86/Intel: allow MASM representation of embedded rounding / SAE
MASM doesn't support the separate operand form; the modifier belongs after the instruction instead. Accept this form alongside the original (now legacy) one. Short of having access to a MASM version to actually check in how far "after the instruction" is a precise statement in their documentation, allow both that and the SDM mandated form where the modifier is on the last register operand (with a possible immediate operand following). Sadly the split out function, at least for the time being, needs to cast away constness at some point, as the two callers disagree in this regard. Adjust some, but not all of the testcases.
Diffstat (limited to 'gas/config/tc-i386-intel.c')
-rw-r--r--gas/config/tc-i386-intel.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/gas/config/tc-i386-intel.c b/gas/config/tc-i386-intel.c
index 80aeb5d..0991f4f 100644
--- a/gas/config/tc-i386-intel.c
+++ b/gas/config/tc-i386-intel.c
@@ -600,6 +600,7 @@ i386_intel_operand (char *operand_string, int got_a_float)
segT exp_seg;
expressionS exp, *expP;
char suffix = 0;
+ bool rc_sae_modifier = i.rounding.type != rc_none && i.rounding.modifier;
int ret;
/* Handle vector immediates. */
@@ -898,7 +899,9 @@ i386_intel_operand (char *operand_string, int got_a_float)
i.types[this_operand].bitfield.unspecified = 0;
++i.reg_operands;
- if (i.rounding.type != rc_none && temp.bitfield.class != Reg)
+ if ((i.rounding.type != rc_none && !i.rounding.modifier
+ && temp.bitfield.class != Reg)
+ || rc_sae_modifier)
{
unsigned int j;