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authorChua Zheng Leong <chuazl@comp.nus.edu.sg>2016-05-25 13:09:51 +0100
committerNick Clifton <nickc@redhat.com>2016-05-25 13:09:51 +0100
commit934c26326909f953aaa15edb423dd4af6f33c448 (patch)
treed8b0fece63410f56a53b6e5a6b0a82ea206c07df /gas/config/tc-arm.c
parent2bbad2ea1102733a2a4143be4afe195caf730cd0 (diff)
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Only generate VMOV.I64 instructions for loading constant floating point values if this instruction is supported by the currently selected fpu.
PR target/2006764 * config/tc-arm.c (move_or_literal_pool): Only generate a VMOV.I64 instruction if supported by the currently selected fpu variant. * testsuite/gas/arm/vfpv3-ldr_immediate.s: Add test of this PR. * testsuite/gas/arm/vfpv3-ldr_immediate.d: Update expected disassembly.
Diffstat (limited to 'gas/config/tc-arm.c')
-rw-r--r--gas/config/tc-arm.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 50a658b..fe46cc4 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -8000,7 +8000,7 @@ move_or_literal_pool (int i, enum lit_type t, bfd_boolean mode_3)
return TRUE;
}
}
- else if (t == CONST_VEC)
+ else if (t == CONST_VEC && ARM_CPU_HAS_FEATURE (cpu_variant, fpu_neon_ext_v1))
{
int op = 0;
unsigned immbits = 0;