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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-05-16 11:49:02 +0100 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-05-16 16:36:26 +0100 |
| commit | 2d78f95bb639209254eb7252f9c48c520bd90d56 (patch) | |
| tree | bb3237d867fff47e17ed615ffa491763a43d8cce /gas/config/tc-arm.c | |
| parent | a8465a06e0986374f501d0e286a5f351af2aa878 (diff) | |
| download | gdb-2d78f95bb639209254eb7252f9c48c520bd90d56.zip gdb-2d78f95bb639209254eb7252f9c48c520bd90d56.tar.gz gdb-2d78f95bb639209254eb7252f9c48c520bd90d56.tar.bz2 | |
[PATCH 24/57][Arm][GAS] Add support for MVE instructions: vmlas, vmulh and vrmulh
gas/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (do_mve_vmlas): New encoding function.
(do_mve_vmulh): Likewise.
(insns): Add entries for MVE mnemonics.
* testsuite/gas/arm/mve-vmlas-bad.d: New test.
* testsuite/gas/arm/mve-vmlas-bad.l: New test.
* testsuite/gas/arm/mve-vmlas-bad.s: New test.
* testsuite/gas/arm/mve-vmulh-bad.d: New test.
* testsuite/gas/arm/mve-vmulh-bad.l: New test.
* testsuite/gas/arm/mve-vmulh-bad.s: New test.
Diffstat (limited to 'gas/config/tc-arm.c')
| -rw-r--r-- | gas/config/tc-arm.c | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 63d5af1..1b65a26 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -15705,6 +15705,33 @@ do_mve_viddup (void) } static void +do_mve_vmlas (void) +{ + enum neon_shape rs = neon_select_shape (NS_QQR, NS_NULL); + struct neon_type_el et + = neon_check_type (3, rs, N_EQK, N_EQK, N_SU_MVE | N_KEY); + + if (inst.operands[2].reg == REG_PC) + as_tsktsk (MVE_BAD_PC); + else if (inst.operands[2].reg == REG_SP) + as_tsktsk (MVE_BAD_SP); + + if (inst.cond > COND_ALWAYS) + inst.pred_insn_type = INSIDE_VPT_INSN; + else + inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN; + + inst.instruction |= (et.type == NT_unsigned) << 28; + inst.instruction |= HI1 (inst.operands[0].reg) << 22; + inst.instruction |= neon_logbits (et.size) << 20; + inst.instruction |= LOW4 (inst.operands[1].reg) << 16; + inst.instruction |= LOW4 (inst.operands[0].reg) << 12; + inst.instruction |= HI1 (inst.operands[1].reg) << 7; + inst.instruction |= inst.operands[2].reg; + inst.is_neon = 1; +} + +static void do_mve_vmaxnma_vminnma (void) { enum neon_shape rs = neon_select_shape (NS_QQ, NS_NULL); @@ -17236,6 +17263,21 @@ do_mve_vsbc (void) } static void +do_mve_vmulh (void) +{ + enum neon_shape rs = neon_select_shape (NS_QQQ, NS_NULL); + struct neon_type_el et + = neon_check_type (3, rs, N_EQK, N_EQK, N_SU_MVE | N_KEY); + + if (inst.cond > COND_ALWAYS) + inst.pred_insn_type = INSIDE_VPT_INSN; + else + inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN; + + mve_encode_qqq (et.type == NT_unsigned, et.size); +} + +static void do_mve_vmull (void) { @@ -24649,6 +24691,10 @@ static const struct asm_opcode insns[] = mCEF(vrmlsldavhx, _vrmlsldavhx, 4, (RRe, RR, RMQ, RMQ), mve_vrmlaldavh), mCEF(vrmlsldavhax, _vrmlsldavhax, 4, (RRe, RR, RMQ, RMQ), mve_vrmlaldavh), + mToC("vmlas", ee011e40, 3, (RMQ, RMQ, RR), mve_vmlas), + mToC("vmulh", ee010e01, 3, (RMQ, RMQ, RMQ), mve_vmulh), + mToC("vrmulh", ee011e01, 3, (RMQ, RMQ, RMQ), mve_vmulh), + #undef THUMB_VARIANT #define THUMB_VARIANT & mve_fp_ext mToC("vcmul", ee300e00, 4, (RMQ, RMQ, RMQ, EXPi), mve_vcmul), |