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author | Victor Do Nascimento <victor.donascimento@arm.com> | 2023-11-20 20:40:10 +0000 |
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committer | Victor Do Nascimento <victor.donascimento@arm.com> | 2024-01-09 10:16:41 +0000 |
commit | 9af8f6711831f2851bf88c46a1f0f2a43fb49be8 (patch) | |
tree | e43d08a9a5c8ab7dd7a04ade9d9219620d09a55c /gas/config/tc-aarch64.c | |
parent | 33ccb0e0dbd9707b537e385dc06eaf0a5b389d8e (diff) | |
download | gdb-9af8f6711831f2851bf88c46a1f0f2a43fb49be8.zip gdb-9af8f6711831f2851bf88c46a1f0f2a43fb49be8.tar.gz gdb-9af8f6711831f2851bf88c46a1f0f2a43fb49be8.tar.bz2 |
aarch64: Add support for 128-bit system register mrrs and msrr insns
With the addition of 128-bit system registers to the Arm architecture
starting with Armv9.4-a, a mechanism for manipulating their contents
is introduced with the `msrr' and `mrrs' instruction pair.
These move values from one such 128-bit system register into a pair of
contiguous general-purpose registers and vice-versa, as for example:
msrr ttlb0_el1, x0, x1
mrrs x0, x1, ttlb0_el1
This patch adds the necessary support for these instructions, adding
checks for system-register width by defining a new operand type in the
form of `AARCH64_OPND_SYSREG128' and the `aarch64_sys_reg_128bit_p'
predicate, responsible for checking whether the requested system
register table entry is marked as implemented in the 128-bit mode via
the F_REG_128 flag.
Diffstat (limited to 'gas/config/tc-aarch64.c')
-rw-r--r-- | gas/config/tc-aarch64.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 6a8ebe4..6d8c356 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -4788,7 +4788,7 @@ parse_sme_sm_za (char **str) static int parse_sys_reg (char **str, htab_t sys_regs, int imple_defined_p, int pstatefield_p, - uint32_t* flags) + uint32_t* flags, bool sysreg128_p) { char *p, *q; char buf[AARCH64_MAX_SYSREG_NAME_LEN]; @@ -4838,6 +4838,9 @@ parse_sys_reg (char **str, htab_t sys_regs, &o->features)) as_bad (_("selected processor does not support system register " "name '%s'"), buf); + if (sysreg128_p && !aarch64_sys_reg_128bit_p (o->flags)) + as_bad (_("128-bit-wide accsess not allowed on selected system" + " register '%s'"), buf); if (aarch64_sys_reg_deprecated_p (o->flags)) as_warn (_("system register name '%s' is deprecated and may be " "removed in a future release"), buf); @@ -7616,12 +7619,14 @@ parse_operands (char *str, const aarch64_opcode *opcode) } info->qualifier = base_qualifier; goto regoff_addr; - case AARCH64_OPND_SYSREG: + case AARCH64_OPND_SYSREG128: { + bool sysreg128_p = operands[i] == AARCH64_OPND_SYSREG128; uint32_t sysreg_flags; if ((val = parse_sys_reg (&str, aarch64_sys_regs_hsh, 1, 0, - &sysreg_flags)) == PARSE_FAIL) + &sysreg_flags, + sysreg128_p)) == PARSE_FAIL) { set_syntax_error (_("unknown or missing system register name")); goto failure; @@ -7635,7 +7640,7 @@ parse_operands (char *str, const aarch64_opcode *opcode) { uint32_t sysreg_flags; if ((val = parse_sys_reg (&str, aarch64_pstatefield_hsh, 0, 1, - &sysreg_flags)) == PARSE_FAIL) + &sysreg_flags, false)) == PARSE_FAIL) { set_syntax_error (_("unknown or missing PSTATE field name")); goto failure; |