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| author | Jan Beulich <jbeulich@suse.com> | 2020-01-30 11:36:33 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-01-30 11:36:33 +0100 |
| commit | aeab2b26dbea33221db4debaf31c97277cfaea5e (patch) | |
| tree | ea035fa04bc87aab42f5381626f3a213273fc992 /gas/ChangeLog | |
| parent | 873494c89fb44747c7514687da25fc163c791b84 (diff) | |
| download | gdb-aeab2b26dbea33221db4debaf31c97277cfaea5e.zip gdb-aeab2b26dbea33221db4debaf31c97277cfaea5e.tar.gz gdb-aeab2b26dbea33221db4debaf31c97277cfaea5e.tar.bz2 | |
x86-64: honor vendor specifics for near RET
While vendors agree about default operand size (64 bits) and hence
unavilability of a 32-bit form, AMD honors a 16-bit operand size
override (0x66) while Intel doesn't.
Diffstat (limited to 'gas/ChangeLog')
| -rw-r--r-- | gas/ChangeLog | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 91d8728..d2a31b5 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,15 @@ 2020-01-30 Jan Beulich <jbeulich@suse.com> + * testsuite/gas/i386/x86-64-branch-2.s, + testsuite/gas/i386/x86-64-branch-4.s, + testsuite/gas/i386/x86-64-branch.s: Add RETW cases. + * testsuite/gas/i386/ilp32/x86-64-branch.d, + testsuite/gas/i386/x86-64-branch-2.d, + testsuite/gas/i386/x86-64-branch-4.l, + testsuite/gas/i386/x86-64-branch.d: Adjust expectations. + +2020-01-30 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (process_suffix): . testsuite/gas/i386/noreg64.s: Add IRET and LRET cases. testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET. |