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authorSterling Augustine <saugustine@google.com>2010-02-11 19:00:21 +0000
committerSterling Augustine <saugustine@google.com>2010-02-11 19:00:21 +0000
commita89c407e4bd3e184672287b6bb57a19fccbfb463 (patch)
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parentb1028c8e8f281d1072e1fd89d8083cb960598a1a (diff)
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2010-02-11 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (cache_literal_section): Handle prefixes as well as suffixes.
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+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2010-02-11 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
+ well as suffixes.
+
+2010-02-10 Sterling Augustine <sterling@tensilica.com>
+
+ * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
+
2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Reformat.
@@ -21,6 +30,7 @@
* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
-mpwr6 and -mpwr7.
+>>>>>>> 1.4086
2010-02-09 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.