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authorAlexandre Oliva <oliva@adacore.com>2020-03-04 17:28:46 +0000
committerNick Clifton <nickc@redhat.com>2020-03-04 17:28:46 +0000
commit749479c8d3b63c9075d2fabf4b87b1f7109608b6 (patch)
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parent440cf44eb0f70830b8d8ac35289f84129c7a35c1 (diff)
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Generate a warning in the ARM assembler if a PC-relative thumb load instruction is detected in a section with insufficient alignment.
* config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is detected in a section which does not have at least 4 byte alignment. * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive. * testsuite/gas/arm/ldr-t.s: Likewise. * testsuite/gas/arm/sp-pc-usage-t.s: Likewise. * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of disassembly, ignoring any NOPs that may have been inserted because of section alignment. * testsuite/gas/arm/ldr-t.d: Likewise.
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+2020-03-04 Alexandre Oliva <oliva@adacore.com>
+
+ * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
+ detected in a section which does not have at least 4 byte
+ alignment.
+ * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
+ * testsuite/gas/arm/ldr-t.s: Likewise.
+ * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
+ * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
+ disassembly, ignoring any NOPs that may have been inserted because
+ of section alignment.
+ * testsuite/gas/arm/ldr-t.d: Likewise.
+
2020-03-04 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (cpu_arch): Add .sev_es entry.