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| author | Jan Beulich <jbeulich@suse.com> | 2019-12-27 09:38:34 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2019-12-27 09:38:34 +0100 |
| commit | 376cd056100dff2d6fc842aa013d0bbffdef363d (patch) | |
| tree | 2fb3cf2b8cfcc1a3fe9cdda133e21fa0e4146377 /gas/ChangeLog | |
| parent | 48bcea9f48cce70005307befbc604de3618bbaf7 (diff) | |
| download | gdb-376cd056100dff2d6fc842aa013d0bbffdef363d.zip gdb-376cd056100dff2d6fc842aa013d0bbffdef363d.tar.gz gdb-376cd056100dff2d6fc842aa013d0bbffdef363d.tar.bz2 | |
x86-64: fix Intel64 handling of branch with data16 prefix
The expectation of x86-64-branch-3 for "call" / "jmp" with an obvious
direct destination to translate to an indirect _far_ branch is plain
wrong. The operand size prefix should have no effect at all on the
interpretation of the operand. The main underlying issue here is that
the Intel64 templates of the direct branches don't include Disp16, yet
various assumptions exist that it would always be there when there's
also Disp32/Disp32S, toggled by the operand size prefix (which is
being ignored by direct branches in Intel64 mode).
Along these lines it was also wrong to base the displacement width
decision solely on the operand size prefix: REX.W cancels this effect
and hence needs taking into consideration, too.
A disassembler change is needed here as well: XBEGIN was wrongly treated
the same as direct CALL/JMP, which isn't the case - the operand size
prefix does affect displacement size there, it's merely ignored when it
comes to updating [ER]IP.
Diffstat (limited to 'gas/ChangeLog')
| -rw-r--r-- | gas/ChangeLog | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 9a51605..578d76f 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,18 @@ 2019-12-27 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (flip_code16): New. + (output_branch, output_jump): Use it. + (i386_displacement): Restrict template set to just direct + branches when handling a respective operand. Don't set Disp16 + when in Intel64 mode and there's a respective template. + * testsuite/gas/i386/i386.exp: Convert x86-64-branch-3 from list + to dump test. Drop its XFail again. + * testsuite/gas/i386/x86-64-branch-3.d: New. + * testsuite/gas/i386/x86-64-branch-3.l: Delete. + * testsuite/gas/i386/x86-64-branch-3.s: Add XBEGIN case. + +2019-12-27 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (i386_addressing_mode): Declare. (match_template): Don't transform displacement width flags for non-indirect branches. Re-write transformation logic. |