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authorChenghua Xu <paul.hua.gm@gmail.com>2018-08-29 20:36:23 +0800
committerChenghua Xu <paul.hua.gm@gmail.com>2018-08-29 20:43:19 +0800
commitbd782c07b914f28fd927cec42eacd8adcf556dca (patch)
tree5fe589fdb8177e2471661eca4f913e6a9616630c /elfcpp
parentac8cb70f3690b4eace1325c7ff918dce9073da7c (diff)
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[MIPS] Add Loongson 3A2000/3A3000 proccessor support.
bfd/ * archures.c (bfd_architecture): New machine bfd_mach_mips_gs464e. * bfd-in2.h (bfd_architecture): Likewise. * cpu-mips.c (enum I_xxx): Likewise. (arch_info_struct): Likewise. * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_GS464E. (mips_set_isa_flags): Likewise. (mips_mach_extensions): Map bfd_mach_mips_gs464e to bfd_mach_mips_gs464 extension. binutils/ * NEWS: Mention Loongson 3A2000/3A3000 proccessor support. * readelf.c (get_machine_flags): Handle gs464e. elfcpp/ * mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS464E. gas/ * config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS464E. (mips_cpu_info_table): Add gs464e descriptors. * doc/as.texi (march table): Add gs464e. include/ * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E. * opcode/mips.h (CPU_XXX): New CPU_GS464E. ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination gs464e and gs464. opcodes/ * mips-dis.c (mips_arch_choices): Add gs464e descriptors.
Diffstat (limited to 'elfcpp')
-rw-r--r--elfcpp/ChangeLog4
-rw-r--r--elfcpp/mips.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/elfcpp/ChangeLog b/elfcpp/ChangeLog
index 2d2a6e1..c744299 100644
--- a/elfcpp/ChangeLog
+++ b/elfcpp/ChangeLog
@@ -1,5 +1,9 @@
2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+ * mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS464E.
+
+2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
+
* mips.c (EF_MIPS_MACH): Rename E_MIPS_MACH_LS3A to
E_MIPS_MACH_GS464.
diff --git a/elfcpp/mips.h b/elfcpp/mips.h
index b2def97..277300f 100644
--- a/elfcpp/mips.h
+++ b/elfcpp/mips.h
@@ -236,6 +236,7 @@ enum
E_MIPS_MACH_LS2E = 0x00A00000,
E_MIPS_MACH_LS2F = 0x00A10000,
E_MIPS_MACH_GS464 = 0x00A20000,
+ E_MIPS_MACH_GS464E = 0x00A30000,
};
// MIPS architecture