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authorJing Yu <jingyu@google.com>2014-07-02 16:21:23 -0700
committerCary Coutant <ccoutant@google.com>2014-07-02 16:21:23 -0700
commit053a4d680b6b870079e7ba094b52a12a4861ce9b (patch)
tree6605ac7e288800f362a77c17dc42b6e897e1fe2b /elfcpp/elfcpp.h
parent2b239efbec446a0c213710b7c5258f2926ef78a4 (diff)
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2014-07-02 Jing Yu <jingyu@google.com>
Initial patch to enable gold aarch64 backend. This patch is just a skeleton which almost does nothing. It does not support ILP32 now. gold/ChangeLog: * aarch64.cc: New file * Makefile.am (TARGETSOURCES): Add aarch64.cc (ALL_TARGETOBJS): Add aarch64.$(OBJEXT) * Makefile.in: Regenerate. * configure.tgt: Add entries for aarch64*. * configure.ac: Likewise. * configure: Likewise. elfcpp/ChangeLog: * aarch64.h: New file. New enums for aarch64-elf64 relocations. * elfcpp.h (EM_AARCH64, SHT_AARCH64_ATTRIBUTES, PT_AARCH64_ARCHEXT, PT_AARCH64_UNWIND): New enum constant.
Diffstat (limited to 'elfcpp/elfcpp.h')
-rw-r--r--elfcpp/elfcpp.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/elfcpp/elfcpp.h b/elfcpp/elfcpp.h
index 561b54a..8e8e675 100644
--- a/elfcpp/elfcpp.h
+++ b/elfcpp/elfcpp.h
@@ -268,6 +268,7 @@ enum EM
EM_UNICORE = 110,
EM_ALTERA_NIOS2 = 113,
EM_CRX = 114,
+ EM_AARCH64 = 183,
EM_TILEGX = 191,
// The Morph MT.
EM_MT = 0x2530,
@@ -406,6 +407,9 @@ enum SHT
// Section contains miscellaneous options.
SHT_MIPS_OPTIONS = 0x7000000d,
+ // AARCH64-specific section type.
+ SHT_AARCH64_ATTRIBUTES = 0x70000003,
+
// Link editor is to sort the entries in this section based on the
// address specified in the associated symbol table entry.
SHT_ORDERED = 0x7fffffff
@@ -490,7 +494,11 @@ enum PT
// Runtime procedure table.
PT_MIPS_RTPROC = 0x70000001,
// .MIPS.options section.
- PT_MIPS_OPTIONS = 0x70000002
+ PT_MIPS_OPTIONS = 0x70000002,
+ // Platform architecture compatibility information
+ PT_AARCH64_ARCHEXT = 0x70000000,
+ // Exception unwind tables
+ PT_AARCH64_UNWIND = 0x70000001
};
// The valid bit flags found in the Phdr p_flags field.