From 053a4d680b6b870079e7ba094b52a12a4861ce9b Mon Sep 17 00:00:00 2001 From: Jing Yu Date: Wed, 2 Jul 2014 16:21:23 -0700 Subject: 2014-07-02 Jing Yu Initial patch to enable gold aarch64 backend. This patch is just a skeleton which almost does nothing. It does not support ILP32 now. gold/ChangeLog: * aarch64.cc: New file * Makefile.am (TARGETSOURCES): Add aarch64.cc (ALL_TARGETOBJS): Add aarch64.$(OBJEXT) * Makefile.in: Regenerate. * configure.tgt: Add entries for aarch64*. * configure.ac: Likewise. * configure: Likewise. elfcpp/ChangeLog: * aarch64.h: New file. New enums for aarch64-elf64 relocations. * elfcpp.h (EM_AARCH64, SHT_AARCH64_ATTRIBUTES, PT_AARCH64_ARCHEXT, PT_AARCH64_UNWIND): New enum constant. --- elfcpp/elfcpp.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'elfcpp/elfcpp.h') diff --git a/elfcpp/elfcpp.h b/elfcpp/elfcpp.h index 561b54a..8e8e675 100644 --- a/elfcpp/elfcpp.h +++ b/elfcpp/elfcpp.h @@ -268,6 +268,7 @@ enum EM EM_UNICORE = 110, EM_ALTERA_NIOS2 = 113, EM_CRX = 114, + EM_AARCH64 = 183, EM_TILEGX = 191, // The Morph MT. EM_MT = 0x2530, @@ -406,6 +407,9 @@ enum SHT // Section contains miscellaneous options. SHT_MIPS_OPTIONS = 0x7000000d, + // AARCH64-specific section type. + SHT_AARCH64_ATTRIBUTES = 0x70000003, + // Link editor is to sort the entries in this section based on the // address specified in the associated symbol table entry. SHT_ORDERED = 0x7fffffff @@ -490,7 +494,11 @@ enum PT // Runtime procedure table. PT_MIPS_RTPROC = 0x70000001, // .MIPS.options section. - PT_MIPS_OPTIONS = 0x70000002 + PT_MIPS_OPTIONS = 0x70000002, + // Platform architecture compatibility information + PT_AARCH64_ARCHEXT = 0x70000000, + // Exception unwind tables + PT_AARCH64_UNWIND = 0x70000001 }; // The valid bit flags found in the Phdr p_flags field. -- cgit v1.1