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| author | DJ Delorie <dj@redhat.com> | 2005-10-25 18:52:02 +0000 |
|---|---|---|
| committer | DJ Delorie <dj@redhat.com> | 2005-10-25 18:52:02 +0000 |
| commit | 92e0a9414cfe5bc3f1ec72a2ff1fae5b8838845b (patch) | |
| tree | 6949f9422509b84b7b4664a87e2a03e082698fbb /cpu | |
| parent | b7b8fb1dfa651aa037c5b22df89e4356dfabd9e0 (diff) | |
| download | gdb-92e0a9414cfe5bc3f1ec72a2ff1fae5b8838845b.zip gdb-92e0a9414cfe5bc3f1ec72a2ff1fae5b8838845b.tar.gz gdb-92e0a9414cfe5bc3f1ec72a2ff1fae5b8838845b.tar.bz2 | |
* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
making one a macro of the other.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/ChangeLog | 5 | ||||
| -rw-r--r-- | cpu/m32c.cpu | 9 |
2 files changed, 11 insertions, 3 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 6ea2b0e..48311b2 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,8 @@ +2005-10-25 DJ Delorie <dj@redhat.com> + + * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by + making one a macro of the other. + 2005-10-21 DJ Delorie <dj@redhat.com> * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu index 93d2bfe..9ac7d78 100644 --- a/cpu/m32c.cpu +++ b/cpu/m32c.cpu @@ -5997,10 +5997,10 @@ ;------------------------------------------------------------- (define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem) - (dni (.sym op 16 -Q-sp) - (.str op ":Q #imm4,sp") + (dni (.sym op 16 -wQ-sp) + (.str op ".w:q #imm4,sp") ((machine 16)) - (.str op "${size}$Q #${Imm-12-s4},sp") + (.str op ".w$Q #${Imm-12-s4},sp") (+ opc1 opc2 opc3 Imm-12-s4) (sem QI Imm-12-s4 sp) ()) @@ -7123,6 +7123,9 @@ (binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem) ; add.BW:Q #imm4,sp (m16 #7) (binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem) +(dnmi add16-bQ-sp "add16-bQ-sp" () + "add.b:q #${Imm-12-s4},sp" + (emit add16-wQ-sp Imm-12-s4)) ; add.BW:G #imm,sp (m16 #6) (binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem) ; add.BW:G src,dst (m16 #4 m32 #6) |