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author | Stafford Horne <shorne@gmail.com> | 2020-05-19 20:40:27 +0900 |
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committer | Stafford Horne <shorne@gmail.com> | 2020-05-19 20:40:27 +0900 |
commit | ae440402f54c634baddc462f8561442befe2cafe (patch) | |
tree | 052696f415d762f88db1d5f92179d225740eb2de /cpu/ChangeLog | |
parent | 7e05773767820b441b23a16628b55c98cb1aef46 (diff) | |
download | gdb-ae440402f54c634baddc462f8561442befe2cafe.zip gdb-ae440402f54c634baddc462f8561442befe2cafe.tar.gz gdb-ae440402f54c634baddc462f8561442befe2cafe.tar.bz2 |
or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts
Reported by Rich Felker when building on 32-bit hosts. Backwards jump
negative offsets were not calculated correctly due to improper 32-bit
to 64-bit zero-extension. The 64-bit fields are present because we
are mixing 32-bit and 64-bit architectures in our cpu descriptions.
Removing 64-bit fixes the issue. We don't use 64-bit, there is an architecture
spec for 64-bit but no implementations or simulators. My thought is if
we need them in the future we should do the proper work to support both
32-bit and 64-bit implementations co-existing then.
cpu/ChangeLog:
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
PR 25184
* or1k.cpu (arch or1k): Remove or64 and or64nd machs.
(ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
(cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
* or1kcommon.cpu (h-fdr): Remove hardware.
* or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
(float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
(float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
(float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
(lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
Diffstat (limited to 'cpu/ChangeLog')
-rw-r--r-- | cpu/ChangeLog | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 2324006..ef6d49a 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,16 @@ +2020-05-19 Stafford Horne <shorne@gmail.com> + + PR 25184 + * or1k.cpu (arch or1k): Remove or64 and or64nd machs. + (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros. + (cpu or1k64bf, mach or64, mach or64nd): Remove definitions. + * or1kcommon.cpu (h-fdr): Remove hardware. + * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions. + (float-regreg-insn): Remove lf- mnemonic -d instruction pattern. + (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern. + (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern. + (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove. + 2020-02-16 David Faust <david.faust@oracle.com> * bpf.cpu (define-cond-jump-insn): Renamed from djci. |