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authorVictor Do Nascimento <victor.donascimento@arm.com>2024-04-16 11:49:15 +0100
committerVictor Do Nascimento <victor.donascimento@arm.com>2024-04-17 11:18:55 +0100
commit5b1c70bfe0d8f84dc28237d6150b7b9d57c791a8 (patch)
treecb4085d24c5ff0dd9d4040509b1470f8ed7b40e2 /binutils
parent75d277b1f506dcfbedfee3bef078dfe2b484958b (diff)
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aarch64: Remove asserts from operand qualifier decoders [PR31595]
Given that the disassembler should never abort when decoding (potentially random) data, assertion statements in the `get_*reg_qualifier_from_value' function family prove problematic. Consider the random 32-bit word W, encoded in a data segment and encountered on execution of `objdump -D <obj_name>'. If: (W & ~opcode_mask) == valid instruction Then before `print_insn_aarch64_word' has a chance to report the instruction as potentially undefined, an attempt will be made to have the qualifiers for the instruction's register operands (if any) decoded. If the relevant bits do not map onto a valid qualifier for the matched instruction-like word, an abort will be triggered and the execution of objdump aborted. As this scenario is perfectly feasible and, in light of the fact that objdump must successfully decode all sections of a given object file, it is not appropriate to assert in this family of functions. Therefore, we add a new pseudo-qualifier `AARCH64_OPND_QLF_ERR' for handling invalid qualifier-associated values and re-purpose the assertion conditions in qualifier-retrieving functions to be the predicate guarding the returning of the calculated qualifier type. If the predicate fails, we return this new qualifier and allow the caller to handle the error as appropriate. As these functions are called either from within `aarch64_extract_operand' or `do_special_decoding', both of which are expected to return non-zero values, it suffices that callers return zero upon encountering `AARCH64_OPND_QLF_ERR'. Ar present the error presented in the hypothetical scenario has been encountered in `get_sreg_qualifier_from_value', but the change is made to the whole family to keep the interface consistent. Bug: https://sourceware.org/PR31595
Diffstat (limited to 'binutils')
-rw-r--r--binutils/testsuite/binutils-all/aarch64/illegal.d1
-rw-r--r--binutils/testsuite/binutils-all/aarch64/illegal.s3
2 files changed, 4 insertions, 0 deletions
diff --git a/binutils/testsuite/binutils-all/aarch64/illegal.d b/binutils/testsuite/binutils-all/aarch64/illegal.d
index 4b90a1d..b69318a 100644
--- a/binutils/testsuite/binutils-all/aarch64/illegal.d
+++ b/binutils/testsuite/binutils-all/aarch64/illegal.d
@@ -8,5 +8,6 @@ Disassembly of section \.text:
0+000 <.*>:
[ ]+0:[ ]+68ea18cc[ ]+.inst[ ]+0x68ea18cc ; undefined
+[ ]+4:[ ]+9dc39839[ ]+.inst[ ]+0x9dc39839 ; undefined
#pass
diff --git a/binutils/testsuite/binutils-all/aarch64/illegal.s b/binutils/testsuite/binutils-all/aarch64/illegal.s
index 216cbe6..43668c6 100644
--- a/binutils/testsuite/binutils-all/aarch64/illegal.s
+++ b/binutils/testsuite/binutils-all/aarch64/illegal.s
@@ -4,4 +4,7 @@
# ldpsw x12, x6, [x6],#-8 ; illegal because one of the dest regs is also the address reg
.inst 0x68ea18cc
+ # illegal, resembles the opcode `ldapur' with invalid qualifier bits
+ .inst 0x9dc39839
+
# FIXME: Add more illegal instructions here.