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authorAndre Vieira <andre.simoesdiasvieira@arm.com>2019-04-15 10:54:42 +0100
committerAndre Vieira <andre.simoesdiasvieira@arm.com>2019-04-15 10:54:42 +0100
commit031254f2111f945ce6a1b8827e1a58ed7141fefe (patch)
treefb46a87cfb24602225e6ee42ef76764e305f1b6f /binutils
parent8669f96f0d1fee8eddc4cb56ba68125abfe61f56 (diff)
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[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI
The patch is straightforward, it does the following: - support the new Tag_CPU_arch build attribute value, ie.: + declare the new value + update all the asserts forcing logic to be reviewed for new architectures + create a corresponding bfd_mach_arm_8_1M_MAIN enumerator in bfd and add mapping from Tag_CPU_arch to it + teach readelf about new Tag_CPU_arch value - declare armv8.1-m.main as a supported architecture value - define Armv8.1-M Mainline in terms of feature bits available - tell objdump mapping from bfd_mach_arm_8_1M_MAIN enumerator to feature bits available - update architecture-specific logic in gas and bfd guarded by the asserts mentioned above. - tests for all the above ChangeLog entries are as follows: *** bfd/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * archures.c (bfd_mach_arm_8_1M_MAIN): Define. * bfd-in2.h: Regenerate. * cpu-arm.c (arch_info_struct): Add entry for Armv8.1-M Mainline. * elf32-arm.c (using_thumb_only): Return true for Armv8.1-M Mainline and update assert. (using_thumb2): Likewise. (using_thumb2_bl): Update assert. (arch_has_arm_nop): Likewise. (bfd_arm_get_mach_from_attributes): Add case for Armv8.1-M Mainline. (tag_cpu_arch_combine): Add logic for Armv8.1-M Mainline merging. *** binutils/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline. *** gas/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline Tag_CPU_arch build attribute value. Reindent. (get_aeabi_cpu_arch_from_fset): Update assert. (aeabi_set_public_attributes): Update assert for Tag_DIV_use logic. * testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test. *** include/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro. (MAX_TAG_CPU_ARCH): Set value to above macro. * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro. (ARM_AEXT_V8_1M_MAIN): Likewise. (ARM_AEXT2_V8_1M_MAIN): Likewise. (ARM_ARCH_V8_1M_MAIN): Likewise. *** ld/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * testsuite/ld-arm/attr-merge-13.attr: New test. * testsuite/ld-arm/attr-merge-13a.s: New test. * testsuite/ld-arm/attr-merge-13b.s: New test. *** opcodes/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
Diffstat (limited to 'binutils')
-rw-r--r--binutils/ChangeLog4
-rw-r--r--binutils/readelf.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index 4b887a1..ac54754 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,7 @@
+2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline.
+
2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (decode_x86_isa): Handle
diff --git a/binutils/readelf.c b/binutils/readelf.c
index 701ab05..1ea4cef 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -14370,7 +14370,7 @@ typedef struct
static const char * arm_attr_tag_CPU_arch[] =
{"Pre-v4", "v4", "v4T", "v5T", "v5TE", "v5TEJ", "v6", "v6KZ", "v6T2",
"v6K", "v7", "v6-M", "v6S-M", "v7E-M", "v8", "v8-R", "v8-M.baseline",
- "v8-M.mainline"};
+ "v8-M.mainline", "", "", "", "v8.1-M.mainline"};
static const char * arm_attr_tag_ARM_ISA_use[] = {"No", "Yes"};
static const char * arm_attr_tag_THUMB_ISA_use[] =
{"No", "Thumb-1", "Thumb-2", "Yes"};