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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 11:53:25 +0100 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2019-04-15 12:31:42 +0100 |
| commit | f6b2b12db82f7b76c30ec389a67fbce5d2805323 (patch) | |
| tree | 4a484080a464cb8286cf428719a427a7d0f60c8d /bfd | |
| parent | 1889da7048b310151d142b100678b6bd6053b548 (diff) | |
| download | gdb-f6b2b12db82f7b76c30ec389a67fbce5d2805323.zip gdb-f6b2b12db82f7b76c30ec389a67fbce5d2805323.tar.gz gdb-f6b2b12db82f7b76c30ec389a67fbce5d2805323.tar.bz2 | |
[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M Mainline
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum.
ChangeLog entries are as follows:
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entriy for bfcsel.
(do_t_v8_1_branch): New switch case for bfcsel.
(toU): Define.
(insns): New instruction for bfcsel.
(md_pcrel_from_section): New switch case
for BFD_RELOC_THUMB_PCREL_BFCSEL.
(md_appdy_fix): Likewise
(tc_gen_reloc): Likewise.
* testsuite/gas/arm/armv8_1-m-bfcsel.d: New.
* testsuite/gas/arm/armv8_1-m-bfcsel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bfcsel.s: New.
* testsuite/ld-arm/bfcsel.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instruction bfcsel.
(print_insn_thumb32): Edit the switch case for %Z.
Diffstat (limited to 'bfd')
| -rw-r--r-- | bfd/ChangeLog | 6 | ||||
| -rw-r--r-- | bfd/bfd-in2.h | 3 | ||||
| -rw-r--r-- | bfd/libbfd.h | 1 | ||||
| -rw-r--r-- | bfd/reloc.c | 5 |
4 files changed, 15 insertions, 0 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 88ca61e..0153964 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,5 +1,11 @@ 2019-04-15 Sudakshina Das <sudi.das@arm.com> + * reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation. + * bfd-in2.h: Regenerated. + * libbfd.h: Likewise. + +2019-04-15 Sudakshina Das <sudi.das@arm.com> + * reloc.c (BFD_RELOC_ARM_THUMB_BF13): New. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 95d66b5..4a3fa75 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -3567,6 +3567,9 @@ field in the instruction. */ /* ARM 5-bit pc-relative branch for Branch Future instructions. */ BFD_RELOC_THUMB_PCREL_BRANCH5, +/* ARM 6-bit pc-relative branch for BFCSEL instruction. */ + BFD_RELOC_THUMB_PCREL_BFCSEL, + /* ARM 17-bit pc-relative branch for Branch Future instructions. */ BFD_RELOC_ARM_THUMB_BF17, diff --git a/bfd/libbfd.h b/bfd/libbfd.h index b3d71d9..32080db 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -1530,6 +1530,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_ARM_PCREL_CALL", "BFD_RELOC_ARM_PCREL_JUMP", "BFD_RELOC_THUMB_PCREL_BRANCH5", + "BFD_RELOC_THUMB_PCREL_BFCSEL", "BFD_RELOC_ARM_THUMB_BF17", "BFD_RELOC_ARM_THUMB_BF13", "BFD_RELOC_ARM_THUMB_BF19", diff --git a/bfd/reloc.c b/bfd/reloc.c index c41b2fe..c0e413c 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -3020,6 +3020,11 @@ ENUMDOC ARM 5-bit pc-relative branch for Branch Future instructions. ENUM + BFD_RELOC_THUMB_PCREL_BFCSEL +ENUMDOC + ARM 6-bit pc-relative branch for BFCSEL instruction. + +ENUM BFD_RELOC_ARM_THUMB_BF17 ENUMDOC ARM 17-bit pc-relative branch for Branch Future instructions. |