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author | Tsukasa OI <research_trasio@irq.a4lg.com> | 2023-07-25 01:02:01 +0000 |
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committer | Tsukasa OI <research_trasio@irq.a4lg.com> | 2023-10-16 04:11:07 +0000 |
commit | f1a0961ee09281ba3ddce1abb0541b45c4185094 (patch) | |
tree | 53a657f23925d33928d13ac55d762f7ebe338e83 /bfd | |
parent | de59d50076b6558dfe21b74efc091c3f9def88fd (diff) | |
download | gdb-f1a0961ee09281ba3ddce1abb0541b45c4185094.zip gdb-f1a0961ee09281ba3ddce1abb0541b45c4185094.tar.gz gdb-f1a0961ee09281ba3ddce1abb0541b45c4185094.tar.bz2 |
RISC-V: Remove RV64E conflict
Since RV32E *and* RV64E are ratified, RV64E is no longer invalid.
This commit removes a restriction that prevents making base ISA with
reduced GPRs with XLEN > 32.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_parse_check_conflicts): Remove RV64E
conflict since the ratified 'E' base ISAs include RV64E.
gas/ChangeLog:
* testsuite/gas/riscv/march-fail-base-02.d: Removed.
* testsuite/gas/riscv/march-fail-base-02.l: Removed.
Diffstat (limited to 'bfd')
-rw-r--r-- | bfd/elfxx-riscv.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 6ed6571..c070394 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1945,13 +1945,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps) int xlen = *rps->xlen; bool no_conflict = true; - if (riscv_lookup_subset (rps->subset_list, "e", &subset) - && xlen > 32) - { - rps->error_handler - (_("rv%d does not support the `e' extension"), xlen); - no_conflict = false; - } if (riscv_subset_supports (rps, "e") && riscv_subset_supports (rps, "h")) { |