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authorRenlin Li <renlin.li@arm.com>2018-03-28 18:06:05 +0100
committerRenlin Li <renlin.li@arm.com>2018-03-28 18:08:51 +0100
commite04ef02299ad4aae08da857e8535d98e8643a274 (patch)
tree97641db4c9e6afb079d360cee7c57e8f135d55a1 /bfd
parent84f1b9fb081372a726fd70dfd8258a707833caef (diff)
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[2/2][LD][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in LD.
This patch adds the following relocation support into binutils bfd linker. BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC. Those relocations includes both ip64 and ilp32 variant.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog17
-rw-r--r--bfd/elfnn-aarch64.c16
-rw-r--r--bfd/elfxx-aarch64.c19
3 files changed, 50 insertions, 2 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 32881d8..b88eb6c 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,6 +1,23 @@
2018-03-28 Renlin Li <renlin.li@arm.com>
PR ld/22970
+ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Add cases for
+ BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
+ BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
+ BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
+ BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
+ BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
+ BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
+ (elfNN_aarch64_final_link_relocate): Support new relocations.
+ * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Support new
+ relocations.
+ (_bfd_aarch64_elf_resolve_relocation): Support new relocations.
+
+2018-03-28 Renlin Li <renlin.li@arm.com>
+
+ PR ld/22970
* reloc.c: Add BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index d6a215e..3ccca77 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -201,6 +201,14 @@
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC \
+ || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12 \
+ || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC \
+ || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12 \
+ || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC \
+ || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12 \
+ || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC \
+ || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12 \
+ || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 \
@@ -5830,6 +5838,14 @@ bad_ifunc_reloc:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
diff --git a/bfd/elfxx-aarch64.c b/bfd/elfxx-aarch64.c
index 4fa5682..08e7cd9 100644
--- a/bfd/elfxx-aarch64.c
+++ b/bfd/elfxx-aarch64.c
@@ -285,11 +285,18 @@ _bfd_aarch64_elf_put_addend (bfd *abfd,
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
if (old_addend & ((1 << howto->rightshift) - 1))
return bfd_reloc_overflow;
/* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
- 12 bits of the page offset following BFD_RELOC_AARCH64_ADR_HI21_PCREL
- which computes the (pc-relative) page base. */
+ 12 bits address offset. */
contents = reencode_ldst_pos_imm (contents, addend);
break;
@@ -457,6 +464,14 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
+ case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+ case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
+ case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
value = value + addend;
break;